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锁相环

使用完整的系列设计及仿真工具,设计、合成和仿真锁相环(PLL)及频率合成器。 确保能够达到关键性能标准并可靠地进行产品制造。 可使用 Agilent EDA 软件产品,例如先进设计系统(ADS)、GoldenGate RFIC 仿真器和/或 Genesys,研究并优化关键特性(例如设置时间和相位噪声),以获得卓越的性能。

在完成设计后,您可以使用安捷伦测试测量设备(例如信号源分析仪、示波器和频谱分析仪)测量和验证设计原型和产品。

E5052B SSA 信号源分析仪可为 PLL/VCO 设计和制造提供快速精确的测量,有助于在较短交付周期内生产出高质量的盈利产品。 仅使用这一综合解决方案,您即可对相位噪声、AM 噪声、锁定时间、VCO 调谐性能、谐波、直流电源噪声进行测量。

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Agilent EEsof EDA 客户教育与服务 
Brief overview of Agilent EEsof EDA Customer Education and Services.

培训资料 2012-02-02

 
Agilent EEsof EDA 客户教育与服务  
Agilent EEsof MMIC Design Symposium

研讨会

 
Genesys 网络研讨会--“如何设计”系列 
Originally broadcast in 2009. Access the 6 WebEX recordings

网上直播 -- 已存档的

 
适合低频测量应用的全新 5Hz 至 3GHz 矢量网络分析仪 - PDN、传感器等 
Originally broadcast Jan 20, 2010

网上直播 -- 已存档的

 
A Practical Approach to Verifying RFICs with Fast Mismatch Analysis 
Originally broadcast October 28, 2010

网上直播 -- 已存档的

 
Agilent EEsof EDA Customer Education and Services 
Brief overview of Agilent EEsof EDA Customer Education and Services.

培训资料 2010-08-11

 
Characterizing phase-locked-loop signal transition behaviors such as microphonic/phase-hits 

研讨会演示 2008-10-10

PDF PDF 1.26 MB
Genesys Webcasts - "How-To-Design" series  
Originally broadcast in 2009. Access the 6 WebEX recordings

网上直播 -- 已存档的

 
Making Early Design Tradeoffs using Advanced Measurement Based Behavioral Models 
This Presentation (Connecting Design and Test Seminar, paper #2) decribes early design tradeoffs using advanced measurement based behavioral models in detail.

研讨会演示 2003-05-29

PDF PDF 2.22 MB
Oscilloscope Measurements Webcast Series 
Live and on-demand broadcasts that will teach you how to make precise measurements with its Infiniium line of real-time and sampling oscilloscopes.

网上直播

 
PCI Express 3.0 Compliance - Successfully Navigating the Standard Webcast 
Original broadcast May 7, 2013

网上直播 -- 已存档的

 
Presentation on ADS for Wireline and High Speed Analog Design 
A detailed Presentation (presented on 21 May 2002) on using Advanced Design System for Wireline and High Speed Analog Design.

研讨会演示 2002-05-21

PDF PDF 4.75 MB
Presentation on Simulating Phase Locked Loops using ADS 
This Presentation details PLL simulation using ADS, Envelope simulation, PLL component behavioral modeling, Phase noise, Spurs, Fractional N-simulation and Divide ratio using sigma delta modulator.

研讨会演示 2010-08-19

PDF PDF 1 MB
Presentation on Trends in Signal Integrity Tests 
A joint Presentation presented by Michael Reser and Rainer Plitschka (Agilent Technologies) on parametric tests for high-speed serial technologies focusing on latest trends in Signal Integrity tests.

培训资料 2006-09-01

PDF PDF 2.13 MB
SSA presentation material – customer viewable slides with speaker notes 

研讨会演示 2008-10-10

PDF PDF 1.01 MB
Successful Modulation Analysis in 3 Steps Webcast 
Original broadcast January 22, 2014

网上直播 -- 已存档的

 
Understanding Jitter and Wander Measurements and Standards, Second Edition 

培训资料 2003-02-01

PDF PDF 6.18 MB