Phase-Locked Loops (PLL)

PLL design, synthesis, optimization and test

Description

Design, synthesize, and simulate phase-locked loops (PLL) and frequency synthesizers with a comprehensive array of design and simulation tools. Make sure that critical performance goals can be achieved and reliably manufactured. Critical characteristics such as settling time and phase noise can be investigated and optimized for superior performance using Agilent's EDA software products such Advanced Design System (ADS), GoldenGate RFIC Simulator and/or Genesys.

After your design is complete, Agilent's test and measurment equipment, such as Oscilloscopes and Spectrum Analyzers, can help you measure and verify your prototype.

Produits connexes

  • Advanced Design System (ADS)
    Electronic design automation software platform offering complete design integration for products such as cellular and portable phones, wireless networks, and radar and satellite communications systems.
  • GoldenGate RFIC Simulation Software
    Advanced simulation and analysis solution for integrated mixed signal RFIC designs. GoldenGate software is fully integrated into the Cadence Analog Design Environment (ADE).
  • W1509L Genesys PLL Synthesis
    Explore PLL architectures and synthesize loop filters.

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