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PDF
116 KB
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1-GHz Digital Channel Multiplexer for Satellite Outdoor Unit Based on a 65-nm CMOS Transceiver
STMicroelectronics needed to rapidly evaluate and prototype real-world effects on a high-performance wideband PHY architecture for satellite communications and used Agilent SystemVue from Agilent EEsof EDA.
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2009-11-17
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Success Story
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1.14 MB
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3GPP W-CDMA Systems: Design and Testing
An Article by G. Jue illustrates how some of the design & verification challenges by emerging wireless signal formats can be addressed by simulating both the RF & baseband portions of a system design.
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2002-06-01
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Article Reprint
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PDF
264 KB
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A WLAN Test System using Test Equipment with EDA Software
This Article by Dingqing Lu & Jinbiao Xu details a test system configured from basic h/w test equipment: signal generator, vector signal analyzer connected with EDA software for testing WLAN systems.
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2003-05-01
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Article Reprint
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PDF
4.58 MB
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Addressing the Design and Verification Challenges of LTE
Wireless Design magazine article on testing LTE.
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2009-02-25
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Article Reprint
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PDF
282 KB
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Agilent Division Delivers Early Test Solutions for LTE User Equipment
Agilent SystemVue greatly accelerates time-to-market for LTE products.
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2009-02-20
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Feature Story
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PDF
225 KB
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An Integrated EDA-tools Flow Improves Designers' Productivity
This Article written by Andy Howard (Agilent Technologies) explains application of an integrated front-to-back design flow to improve the quality and efficiency in the design of a prescaler.
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2002-05-30
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Article Reprint
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PDF
275 KB
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Characterize the high-speed data path from the computer to the display
With the performance gains of each new computer
generation comes an increase in the size of the display.
To manage these ever-larger displays, the graphics system must control an ever-increasing number of pixels.
See the Insight article 1999 Volume 4, Issue 4 for more information.
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2007-02-22
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Article Reprint
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PDF
806 KB
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Creating High-Performance SDR Architectures
How to co-design RF architectures together with baseband signal processing to create high performance and flexible SDR architectures that can achieve the critical performance specifications necessary in the operational environment.
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2008-11-25
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Article Reprint
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PDF
968 KB
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Custom, Real-World Waveforms Integrating Test Equipment Into the Design Process
This Article by J. Kikuchi & G. Jue (Agilent) demonstrates how design software and test instrumentation can be used together to create and analyze newly developed 36 signal formats for system design.
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2000-09-01
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Article Reprint
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PDF
543 KB
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Exploring The Test Requirements For DisplayPort Receivers
Exploring The Test Requirements For DisplayPort Receivers
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2008-01-28
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Article Reprint
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Eye-Diagram Analysis Speeds DDR SDRAM Validation
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2009-01-06
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Article Reprint
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Follow Agilent EEsof EDA on Twitter!
Twitter enables you to keep current on news and updates with Agilent EEsof through the exchange of quick, frequent answers to one simple question: What are you doing?
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2009-06-29
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Newsletter
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PDF
83 KB
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I/O System and Chip Verification in PCI and PCI-X Systems
Windows and CompactPCI team up for high-availability systems.
See the Insight article Volume 5, Issue 3 2000
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2002-10-23
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Article Reprint
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PDF
196 KB
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Inphi Delivers Memory Interface Chip for DDR3-1600 Using Advanced Design System
This Success Story details how Inphi delivered memory interface chip for DDR3-1600 using Agilent’s Advance Design System (ADS).
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2009-03-12
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Success Story
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PDF
220 KB
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Instruments Play New Roles on the Benchtop and on the Desktop too
This Article discusses the new Roles of Instruments on the Benchtop and the Desktop and the merger between the hardware and the software.
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2002-06-10
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Article Reprint
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Making Digital Flat Panels Better
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2009-10-27
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Article Reprint
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PDF
847 KB
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Practical Analysis of Backplane Vias - White Paper
This paper describes the methodology of using measurements on a test vehicle to build a high bandwidth, scalable model of long vias which includes the through and stub effects which can be used for system simulation.
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2009-04-20
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Feature Story
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PDF
411 KB
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Signal Integrity Analysis and Simulation Tools include IBIS Models
This Article describes the types of models that need to be taken together for high-speed signal integrity analysis, and illustrates their use in a simulation of a high-speed memory circuit.
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2004-09-01
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Article Reprint
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PDF
1.8 MB
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Signal Integrity Simulation of PCI Express Gen 2 Channel
Article reprint from XrossTalk Magazine, Janurary 2009, author Jason Boh.
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2009-03-23
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Article Reprint
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Simplify DDR Validation with SI Methods
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2008-01-06
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Article Reprint
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SystemVue 2008 Earns eg3.com's Editor's Choice Award
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2008-11-21
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Success Story
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Validating the Physical and Protocol Layers in DDR Memory Interfaces
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2009-01-06
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Article Reprint
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Wireless Systems Design Award
Wireless Systems Design magazine award ADS/Connected Solutions the prestigious 2003 Industry Award for Best Wireless Design Tool.
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2003-02-25
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Success Story
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