High-Speed Digital
- Design & Simulation: Download the Quick Start Guide
- Analysis & Debug: Download the Debugging application note
- Compliance: Visit the compliance web page
- Signal Integrity: Link to the PLTS technical overview
In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.
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Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.
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Jitter Analysis Techniques for High Data Rates (AN 1432)
This new application note describes the basic jitter measurements and the specific measurement techniques used in SONet/SDH/OTN and Gigabit Ethernet applications.
Application Note 2003-02-03 |
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Measuring Jitter in Digital Systems (AN 1448-1)
Measuring jitter and how to calculate total jitter.
Application Note 2008-01-30 |
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Signal Integrity Analysis Series Part 1: Single-Port TDR, TDR/TDT, & 2-Port TDR
This Application Note focuses on part 1: those which use a single-port TDR, those which use TDR/TDT, and those which use 2-port TDR.
Application Note 2007-01-01 |
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Signal Integrity Analysis Series Part 2: 4-Port TDR/VNA/PLTS
This Application Note focuses on part 2: those which use a 4-port TDR/VNA/PLTS.
Application Note 2007-02-21 |
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Signal Integrity Analysis Series Part 3: The ABCs of De-Embedding
This Application Note focuses on Part 3: The ABCs of De-Embedding explaining different de-embedding techniques & shows how to minimize fixture effects for best results.
Application Note 2007-07-01 |
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Using Clock Jitter Analysis to Reduce BER in Serial Data Applications
This Application Note emphasizes on the emerging techniques for reference clock jitter analysis from the perspective of oscillator physics, phase noise theory, and serial data technology.
Application Note 2006-12-01 |
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