聯絡安捷倫專家

高速數位解決方案

本內容需使用具 JavaScript 啟用的瀏覽器或Adobe Flash Player 觀看

取得 Flash 

每一代數位標準的變化，都會帶來新的產品設計風險。藉由與業界專家以及像您這樣的工程師共同合作，我們得以取得第一手資訊並順利開發產品。 安捷倫高速數位測試解決方案建構於我們不斷與業界專家進行溝通交流的量測技術與專業知識之上。 藉由與您分享我們最先進的量測專業知識，安捷倫可協助您順利克服挑戰，並且加速推出傲視業界的產品。安捷倫是協助您實現最佳設計的推手。

瀏覽整個設計周期

請瀏覽產品網頁，以便觀看並尋找在設計週期的四個階段以及執行重要的信號完整度分析所需的解決方案。

觀看YouTube影片 

最新消息

相關連結

縮小範圍

移除所有細分

依應用

依內容類型

依產品分類

1-21 / 21

排序：
ADMF: Facing the challenges of Super speed USB 3.0 Product Development  
Agilent Digital Measurement Forum (ADMF): Facing the challenges of Super speed USB Product Development

研討會講義 2008-11-12

PDF PDF 1.78 MB
Analyzing Digital Jitter and its Component eSeminar FAQs 
FAQs from the eSeminar

研討會講義 2006-05-11

PDF PDF 35 KB
Building a Precision Jitter Source 
Presentation, June 1, 2004 From the Japan Agilent Digital Measurement Forum, this presentation reviews the construction of a precision jitter source for analyzing digital jitter measurements.

研討會講義 2004-06-01

PDF PDF 623 KB
Characterization and Modeling of a High Speed Backplane Differential Channels eSeminar FAQs 
FAQs from the eSeminar

研討會講義 2006-05-11

PDF PDF 80 KB
Hacking the Backplane:Complete Differential Channel Characterization & Analysis from 4-port Meas. 

研討會講義 2008-11-09

 
Introduction to EMI/EMC Challenges and Their Solution 
Agilent EEsof EDA presentation on how to, "Overcome High Speed Digital Design Challenges".

研討會講義 2012-02-16

PDF PDF 3.46 MB
Jitter Analysis: What Works, What Doesn't & Why eSeminar FAQs 
FAQs from the eSeminar

研討會講義 2006-05-11

PDF PDF 63 KB
Jitter in Digital Circuits eSeminar FAQs 
FAQs from the eSeminar

研討會講義 2006-05-11

PDF PDF 34 KB
Jitter Measurements for High-Speed Digital 
Jitter Measurements for High-Speed Digital Transmission

研討會講義 2006-06-14

PDF PDF 44 KB
Jitter Measurements with a High-Speed Scope eSeminar FAQs 
FAQs from the eSeminar

研討會講義 2006-05-11

PDF PDF 117 KB
Minimizing Crosstalk in Hi-Speed Interconnects using Measurement-based Modeling 
This Presentation presented by Mike Resso (Agilent Technologies) focuses on minimizing crosstalk in high speed interconnects using measurement-based modeling.

研討會講義 2006-09-01

PDF PDF 1.50 MB
Overcome PI Challenges on Perforated Power/Groung Planes 
This presentation explains a different approach that's applicable to PI analysis on cost reduced consumer boards whose power/ground planes are perforated with signal traces.

研討會講義 2012-01-19

PDF PDF 2.30 MB
Overcome Signal Integrity Challenges in the multigigabit(s) Era 
When digital signals reach gigabit/s speeds, the unpredictable becomes the norm. The process of getting your project back on track starts with the best tools for the job.

研討會講義 2011-12-15

PDF PDF 781 KB
Overcoming Return-Path-Discontinuity in DDR3 and GDDR5 Memory-Controller Packages 
A day in the life of a Memory Architect.

研討會講義 2011-10-24

PDF PDF 1.86 MB
Signal Integrity Design Using Channel Simulation and EM Co-design 
The materials in this self-guided workshop will show you the “what if” design space exploration workflow that our new statistical eye diagram channel simulator enables

研討會講義 2010-04-21

 
Signal Integrity eSeminar Series Q&A: Being Successful with Fully Buffered DIMM (FBD) Designs 
The following Questions and Answers were created from the live eSeminar broadcast of January 25, 2005. You can view the archived eSeminar by going to

研討會講義 2005-01-25

PDF PDF 60 KB
Solving Real World Jitter Problems for High-Speed Communications eSeminar FAQs 
FAQs from the eSeminar

研討會講義 2006-05-11

PDF PDF 53 KB
Successful High Speed Digital Design with ADS, EMPro, and SystemVue 
The materials in this self-guided workshop will show you the latest high speed digital capabilites in ADS 2011.

研討會講義 2011-09-29

 
TDR vs. VNA Interconnect Characterization eSeminar FAQs 
FAQs from the eSeminar

研討會講義 2006-05-11

PDF PDF 18 KB
Testing Receiver Jitter Tolerance eSeminar FAQs 
Testing Receiver Jitter Tolerance eSeminar FAQs

研討會講義 2006-06-14

PDF PDF 50 KB
Why Do Measurement-based Channel Modeling? 
Adobe .pdf of the paper presented at the High-Speed Digital Seminar, Ensuring MultiGigabit Design Success

研討會講義 2008-01-20

PDF PDF 3.62 MB