High-Speed Digital
- Design & Simulation: Download the Quick Start Guide
- Analysis & Debug: Download the Debugging application note
- Compliance: Visit the compliance web page
- Signal Integrity: Link to the PLTS technical overview
In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.
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Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.
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- Signal Integrity (1)
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- Application Note (7)
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1-7 of 7
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8 Hints for Debugging and Validating High-speed Buses
8 Hints for Debugging High-speed Buses
Application Note 2002-03-05 |
PDF
2.24 MB
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Debugging Parallel RapidIO Designs
Application Note 2003-01-09 |
PDF
356 KB
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Designing and Validating High-Speed Memory Buses (AN 1382-2)
DDR SDRAM (double data rate synchronous dynamic random access memory) is quickly becoming an accepted technology in the PC (personal computer) industry. Its low cost, high performance, and increasingly wide availability make it very desirable for PC memory buses and embedded designs such as high...
Application Note 2001-12-20 |
PDF
1.51 MB
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Improve Your Time-to-Insight:Debugging Intermittent Memory Failures in DDR and DDR2 Systems
Application Note 1575
Application Note 2006-04-14 |
PDF
120 KB
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InfiniBand System Level Debugging (AN 1382-1)
This application note is written for R & D engineers developing InfiniBand processors and InfiniBand system designers and integrators. It covers key concepts underlying system-level debug and validation of InfiniBand systems.
Application Note 2004-03-17 |
PDF
2.10 MB
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Planning Your Design for Debug: FPGA Dynamic Probe
Application Note 2005-01-26 |
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Saving Time with Multiple-Channel Signal Integrity Measurements, (AN 1382-8)
System complexity continues to grow exponentially. This results in more buses with more high-speed signals, which translates into more chances of signal integrity problems. Complex protocols, varying data payloads, and multiple operating modes create more opportunities for signal integrity to be...
Application Note 2002-03-14 |
PDF
1.29 MB
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