High-Speed Digital
- Design & Simulation: Download the Quick Start Guide
- Analysis & Debug: Download the Debugging application note
- Compliance: Visit the compliance web page
- Signal Integrity: Link to the PLTS technical overview
In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.
Navigate the entire design cycle
Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.
Affiner la liste
Par application
- Signal Integrity (1)
- Design and Simulation of High-Speed Digital (2)
- High-Speed Digital Analysis (11)
- Compliance for High-Speed Bus and Serial Interconnects (4)
Par type de contenu
- Bibliothèque
- Notes d’application
- Notes d’application (16)
- Notes d’application
Par catégorie de produit
-
Toutes les catégories de produit
-
Generators, Sources, Supplies
-
Pulse Generator Products
- 81110A Pulse Pattern Generator, 165/330 MHz (1)
- 81130A Pulse Data Generator, 400/660 MHz and 1.32 Gb/s (2)
- 81133A Pulse Pattern Generator, 3.35 GHz, single channel (4)
- 81134A Pulse Pattern Generator, 3.35 GHz, dual-channel (6)
- N4903B J-BERT high-performance serial BERT up to 7 Gb/s and 12.5 Gb/s with complete jitter tolerance (6)
-
Pulse Generator Products
-
Generators, Sources, Supplies
1-16 sur 16
|
Advanced Jitter Generation and Analysis Product Note
This product note shows how the Agilent pulse generators can be used with the DCA-J Oscilloscope.
Notes d’application 2004-10-04 |
|
|
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Software Platform: 8 pages
Notes d’application 2007-01-31 |
|
|
Calibrated Jitter, Jitter Tolerance Test and Jitter Laboratory with the Agilent J-BERT N4903A
This application note describes the N4903A BERT characterization solution for emerging serial gigabit devices: it helps engineers make quick and accurate jitter tolerance tests, which have been complicated and hard to do in the past.
Notes d’application 2006-07-18 |
|
|
Eye Characterization on Idle and Framed Data Traffic: the Bit Recovery Mode
Traditionally, bit error rate testing compares the bits from a Device Under Test (DUT) against a reference data set, called the expected data. The user of Bit Error Ratio Tester (BERT) has to provide this expected data and load it into the tester.
Notes d’application 2005-09-21 |
|
|
Fast Total Jitter Test Solution
This application note compares different total jitter measurement and extrapolation techniques to the Fast Total Jitter Measurement
Notes d’application 2005-08-29 |
|
|
Finding Sources of Jitter with Real-Time Jitter Analysis (AN 1448-2)
This application note describes how to use a real-time oscilloscope with jitter analysis, along with the stimulus-response techniques, to meet the critical time-correlation requirement to relate jitter trend measurement results to measured signals.
Notes d’application 2003-06-30 |
|
|
Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.
Notes d’application 2009-03-24 |
|
|
Jitter Analysis Techniques for High Data Rates (AN 1432)
This new application note describes the basic jitter measurements and the specific measurement techniques used in SONet/SDH/OTN and Gigabit Ethernet applications.
Notes d’application 2003-02-03 |
|
|
Measuring Jitter in Digital Systems (AN 1448-1)
Measuring jitter and how to calculate total jitter.
Notes d’application 2008-01-30 |
|
|
Method of Implementation (MOI) for DisplayPort Sink Compliance Test
Method of Implementation (MOI) for DisplayPort Sink Compliance Test
Notes d’application 2008-08-18 |
|
|
PCI Express Receiver Design Validation Test with 81134A / 81250A
Describes functional validation and compliance and stress tests for PCI Express receiver design
Notes d’application 2005-03-18 |
|
|
PCI Express Transmitter Electrical Validation and Compliance Testing - Application Note
This application note is intended for digital designers and developers validating electrical
performance of PCI Express-based designs and working toward electrical compliance of PCI Express products.
Notes d’application 2011-10-28 |
|
|
PCIe Revision 2 Receiver Jitter Tolerance Testing with J-BERT N4903B
This document focuses on physical layer testing of the transmitter (TX) and receiver (RX) ports of PCI EXPRESS® (PCIe) devices.
Notes d’application 2006-01-30 |
|
|
Simulation of Jittering Synchronization Signals for Video Interfaces (PN 4)
This Product Note shows how Research and Development engineers use pulse generators of the Agilent 81100 Family for the development of interfaces ...
Notes d’application 2006-12-12 |
|
|
USB 2.0 Compliance Testing with Infiniium Oscilloscopes - Application Note
This Application Note discusses the Agilent solution for the USB 2.0 test suite. The Agilent solution is the only one-box solution that uses the official USB-IF scripts for precompliance ans compliance testing.
Notes d’application 2013-05-10 |
|
|
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices
Notes d’application 2007-06-19 |
|
