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High-Speed Digital
- Design & Simulation: Download the Quick Start Guide
- Analysis & Debug: Download the Debugging application note
- Compliance: Visit the compliance web page
- Signal Integrity: Link to the PLTS technical overview
In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.
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Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.
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An Innovative Simulation Workflow for Debugging High-Speed Digital Designs Using Jitter Separation
This paper presents a new simulation workflow for jitter separation analysis.
Application Note 2013-06-06 |
PDF
606 KB
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Designing High Speed Backplanes Utilizing Physical Layer Test System
This Application Note focuses on the problems introduced into the backplane assembly design by the many linear passive components that create reflections due to impedance discontinuities.
Application Note 2006-01-18 |
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Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow
Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow.
Application Note 2012-09-21 |
PDF
467 KB
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Frequency Domain Analysis of Jitter Amplification in Clock Channels
Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained.
Application Note 2012-11-01 |
PDF
257 KB
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Simulating FPGA Power Integrity Using S-Parameter Models
This application note describes how self-impedance (frequency) can easily be determined by simulating the frequency domain self-impedance profile of a Power Distribution Network (PDN).
Application Note 2012-04-02 |
PDF
5.68 MB
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Simulating High-Speed Serial Channels with IBIS-AMI Models
This paper reviews some of the benefits and limitations of using IBIS models and introduces the new AMI extensions to the latest IBIS version 5.0 specification.
Application Note 2011-11-15 |
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Using ADS for Signal Integrity Optimization
This white paper shows how to replace a multi-dimensional sweep of a long running PRBS time-domain simulation (including manual data evaluation) by short, channel-pulse characterization in the Advanced Design System to efficiently optimize a channel.
Application Note 2009-10-19 |
PDF
275 KB
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Which Electromagnetic Simulator Should I Use?
This paper outlines three of the key EM simulation technologies, MoM, FEM, FDTD and attempt to compare and contrast the relative merits of each.
Application Note 2012-04-06 |
PDF
3.21 MB
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