Digital Design & Interconnect Standards
Achieve your best design with Agilent. Investigate specific solutions for high speed standards plus solutions for your high-speed digital design cycle (design, simulation, analysis, debug compliance and signal integrity) challenges.
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1-25 of 60
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A Time-Saving Method for Analyzing Signal Integrity in DDR Memory Buses
This application note covers new tools and measurement techniques for characterizing and validating signal integrity of DDR (double data rate
synchronous dynamic random access memory) signals.
Application Note 2008-09-10 |
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Accurate Calibration of Receiver Stress Test Signals for PCI Express® Rev. 3.0
This paper describes the calibration of the receiver-stress signal according to the base specification of PCIe3. The calibration of the RX test signal is different from PCIe 2.0.
Application Note 2011-06-22 |
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Advanced Jitter Generation and Analysis Product Note
This product note shows how the Agilent pulse generators can be used with the DCA-J Oscilloscope.
Application Note 2004-10-04 |
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Advanced Techniques for PCIe 3.0 Receiver Testing-Paper
Advanced Techniques for PCIe 3.0 Receiver Testing-Paper
Application Note 2011-09-01 |
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An Overview of the Electrical Validation of 10BASE-T, 100BASE-TX, and 1000BASE-T
The technology used in these ports, commonly known as “LAN” or “NIC” ports, is usually one of the 10BASE-T, 100BASE-TX, and 1000BASE-T standards or a combination of them.
Application Note 2011-01-11 |
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Automated PCI Express Receiver Compliance Test and Characterization with N5990A
This product note shows how to use the test automation software platform to verify and debug your PCI Express bus designs. As an example, a multi-lane add-in card is used.
Application Note 2006-08-29 |
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Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Software Platform: 8 pages
Application Note 2007-01-31 |
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Benefits of using PCI Express 2.0.
An overview of the main features and benefits of using PCI Express 2.0
Application Note 2008-10-17 |
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Calibrated Jitter, Jitter Tolerance Test and Jitter Laboratory with the Agilent J-BERT N4903A
This application note describes the N4903A BERT characterization solution for emerging serial gigabit devices: it helps engineers make quick and accurate jitter tolerance tests, which have been complicated and hard to do in the past.
Application Note 2006-07-18 |
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Characterizing Clock Jitter through Phase Noise Measurements Speeds up Design Verification Process
This white paper discusses a new measurement method for obtaining highly accurate low random jitter (RJ) measurements and performing real-time analysis of RJ and periodic jitter (PJ) of components.
Application Note 2008-11-20 |
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Characterizing High-Speed Optical Transmitters Compliance Testing with the Agilent 86100A AN: 1340-1
This application note will focus on the testing of opticaltransmitters used by three communications technologies:SONET/SHD, Gigabit Ethernet, and Fibre Channel.
Application Note 2000-08-01 |
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Comparison of Different Jitter Analysis Techniques With a Precision Transmitter
This white paper describes how various jitter analysis techniques give dissimilar results. Which is right? We built a precision jitter transmitter to compare results of different techniques where test sets were exposed to known levels of jitter.
Application Note 2006-04-06 |
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Debugging USB 2.0: It's Not Just A Digital World (AN 1382-3)
Debugging USB 2.0 Systems
Application Note 2006-10-05 |
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Evaluating Microstrip with Time Domain Reflectometry (AN 1304-1)
This application note discusses microstrip transmission line techniques that were evaluated using TDR measurements.
Application Note 2000-11-01 |
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Evaluating Oscilloscope Sample Rates vs. Sampling Fidelity
Evaluating Oscilloscope Sample Rates vs. Sampling Fidelity: How to Make the Most Accurate Digital Measurements When you select an oscilloscope for accurate, high-speed digital measurements, sampling fidelity can often be more important than maximum sample rate.
Application Note 2012-11-11 |
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Eye Characterization on Idle and Framed Data Traffic: the Bit Recovery Mode
Traditionally, bit error rate testing compares the bits from a Device Under Test (DUT) against a reference data set, called the expected data. The user of Bit Error Ratio Tester (BERT) has to provide this expected data and load it into the tester.
Application Note 2005-09-21 |
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Fast Total Jitter Test Solution
This application note compares different total jitter measurement and extrapolation techniques to the Fast Total Jitter Measurement
Application Note 2005-08-29 |
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Faster Risetime for TDR Measurements (PN 86100-4)
This product note demonstrates how to make time domain reflection (TDR) measurements on electrical networks with better than 40 ps resolution.
Application Note 2001-07-01 |
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Finding Sources of Jitter with Real-Time Jitter Analysis (AN 1448-2)
This application note describes how to use a real-time oscilloscope with jitter analysis, along with the stimulus-response techniques, to meet the critical time-correlation requirement to relate jitter trend measurement results to measured signals.
Application Note 2003-06-30 |
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Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.
Application Note 2009-03-24 |
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HDMI Sink and Source Compliance Test and Characterization
In this product note examples are given for advanced, automated HDMI compliance tests and characterization based on a high bandwidth oscilloscope, a TMDS Signal Generator and the Test Automation Software Platform.
Application Note 2006-10-27 |
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High Precision Time Domain Reflectometry (AN 1304-7)
Techniques for achieving the highest possible accuracy and resolution in signal integrity impedance measurements
Application Note 2003-10-27 |
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High-Precision TDR with the Agilent 86100 DCA & Picosecond Pulse Labs 4020 Source Enhancement Module
Learn how to build a high-precision time-domain reflectometry/time-domain transmission measurement system.
Application Note 2003-09-12 |
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How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)
Application Note 2007-07-30 |
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How to Pass Receiver Test According to PCI Express® 3.0 CEM Specification
This paper provides insight into the calibration method and tests, as well as the tools available. The biggest change between PCIe 2.x and rev. 3.0 is that RX test on cards will now be normative.
Application Note 2011-11-30 |
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