Digital Design & Interconnect Standards

Achieve your best design with Agilent. Investigate specific solutions for high speed standards plus solutions for your high-speed digital design cycle (design, simulation, analysis, debug compliance and signal integrity) challenges.

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1-25 of 166

An Innovative Simulation Workflow for Debugging High-Speed Digital Designs Using Jitter Separation This paper presents a new simulation workflow for jitter separation analysis. Application Note 2013-06-06	PDF 606 KB
Time Domain Reflectometry Theory - Application Note When compared to other measurement techniques, time domain reflectometry provides a more intuitive and direct look at the DUT's characteristics. Application Note 2013-05-31	PDF 1.40 MB Sprachen English \| 2013-05-31 \| PDF 1.40 MB 日本語 \| 2000-03-01 \| PDF 1.42 MB
Agilent Method of Implementation (MOI) for 10GBASE-T Ethernet Cable Tests Agilent Method of Implementation (MOI) for 10GBASE-T Cable Tests Using Agilent E5071C ENA Option TDR Application Note 2013-05-21	PDF 2.13 MB
USB 2.0 Compliance Testing with Infiniium Oscilloscopes - Application Note This Application Note discusses the Agilent solution for the USB 2.0 test suite. The Agilent solution is the only one-box solution that uses the official USB-IF scripts for precompliance ans compliance testing. Application Note 2013-05-10	PDF 2.02 MB Sprachen English \| 2013-05-10 \| PDF 2.02 MB 日本語 \| 2010-01-14 \| PDF 3.64 MB
Method of Implementation (MOI) for HDMI 1.4b Cable Assembly Test Method of Implementation (MOI) for HDMI 1.4b Cable Assembly Test Using Agilent E5071C ENA Network Analyzer Option TDR. Application Note 2013-04-24	PDF 2.02 MB
MOI for DisplayPort PHY CTS 1.2b Source Testing This document is provided "AS IS" and without any warranty of any kind, including, without limitation, any expressed or implied warranty of non-infringement, merchantability or fitness for a particular purpose. In no event shall VESA™ or any member of VESA be liable for any direct, indirect, special, exemplary, punitive, or consequential damages, including, without limitation, lost profits, even if advised of the possibility of such damages. This material is provided for reference only. VESA does not endorse any vendor’s equipment, including equipment outlined in this document. Application Note 2013-03-21	PDF 5.63 MB
MOI for DisplayPort PHY CTS 1.2b Sink Tests This document is provided "AS IS" and without any warranty of any kind, including, without limitation, any express or implied warranty of non-infringement, merchantability or fitness for a particular purpose. In no event shall VESA™ or any member of VESA be liable for any direct, indirect, special, exemplary, punitive, or consequential damages, including, without limitation, lost profits, even if advised of the possibility of such damages. This material is provided for reference only. VESA does not endorse any vendor’s equipment including equipment outlined in this document. Application Note 2013-03-21	PDF 7.99 MB
Agilent Method of Implementation (MOI) for DisplayPort Cable-Connector Assembly Compliance Test Agilent Method of Implementation (MOI) for DisplayPort Cable-Connector Assembly Compliance Test Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2013-02-18	PDF 1.29 MB
Agilent Method of Implementation (MOI) for MHL Cables Compliance Tests Agilent Method of Implementation (MOI) for MHL Cable Compliance Tests Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2013-02-14	PDF 1.76 MB Sprachen English \| 2013-02-14 \| PDF 1.76 MB 日本語 \| 2013-02-14 \| PDF 1.76 MB
DDR4 TdiVW/VdiVW Bit Error Rate Measurement or Understanding Bit Error Rate Importance of making BER measurement calculations to form a statistical measurement of total jitter to understand the design's data valid window result and design error rates. Application Note 2013-01-24	PDF 1.65 MB
Agilent Method of Implementation (MOI) for USB3.0 Cable-Connector Assembly Compliance Test Agilent Method of Implementation (MOI) for USB3.0 Cable-Connector Assembly Compliance Test Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2012-12-17	PDF 1.82 MB
DDR Memory Overview, Development Cycle, and Challenges - Technical Overview Thanks to improved manufacturing processes that have driven down costs, the technology of choice is now DDR SDRAM, short for Double Data Rate Synchronous Dynamic Random Access Memory. Application Note 2012-12-14	PDF 1.37 MB
Evaluating Oscilloscope Sample Rates vs. Sampling Fidelity Evaluating Oscilloscope Sample Rates vs. Sampling Fidelity: How to Make the Most Accurate Digital Measurements When you select an oscilloscope for accurate, high-speed digital measurements, sampling fidelity can often be more important than maximum sample rate. Application Note 2012-11-11	PDF 1.56 MB Sprachen English \| 2012-11-11 \| PDF 1.56 MB 日本語 \| 2007-03-08 \| PDF 5.15 MB 中文（繁體） \| 2009-04-24 \| PDF 2.14 MB 한국어 \| 2006-09-28 \| PDF 1.31 MB
Frequency Domain Analysis of Jitter Amplification in Clock Channels Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained. Application Note 2012-11-01	PDF 257 KB
Agilent Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test Agilent Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2012-10-16	PDF 1.62 MB
Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow. Application Note 2012-09-21	PDF 467 KB Sprachen English \| 2012-09-21 \| PDF 467 KB 日本語 \| 2013-02-15 \| PDF 415 KB
S-parameter Series: Practical Application of the InfiniiSim Waveform Transformation Toolset Applicat Presents and addresses five of the most common problems that confront engineers when trying to measure performance on high speed links, using an oscilloscope. Application Note 2012-08-21	PDF 9.77 MB Sprachen English \| 2012-08-21 \| PDF 9.77 MB 中文（简体） \| 2012-08-21 \| PDF 9.77 MB 한국어 \| 2012-08-21 \| PDF 9.77 MB
Crossing the Digital-Analog Divide - White Paper This white paper helps to better understand how to cope with the physical nature of signals that we might prefer to think of as bits, nibbles and bytes, let's start with an ideal digital waveform. Application Note 2012-05-02	PDF 6.46 MB
Which Electromagnetic Simulator Should I Use? This paper outlines three of the key EM simulation technologies, MoM, FEM, FDTD and attempt to compare and contrast the relative merits of each. Application Note 2012-04-06	PDF 3.21 MB
Simulating FPGA Power Integrity Using S-Parameter Models This application note describes how self-impedance (frequency) can easily be determined by simulating the frequency domain self-impedance profile of a Power Distribution Network (PDN). Application Note 2012-04-02	PDF 5.68 MB Sprachen English \| 2012-04-02 \| PDF 5.68 MB 日本語 \| 2012-06-25 \| PDF 1.40 MB
USB 3.0 Protocol Testing with Active Error Insertion Application Note Speed up design and verification of USB designs using the U4612A Jammer Application Note 2012-03-19	PDF 3.51 MB
S-parameter Series: Using De-embedding Tools for Virtual Probing Application Note Discusses using de-embedding tools to gain virtual access to difficult measurement points Application Note 2012-03-11	PDF 2.09 MB Sprachen English \| 2012-03-11 \| PDF 2.09 MB 中文（简体） \| 2012-03-11 \| PDF 2.09 MB 한국어 \| 2012-03-11 \| PDF 2.09 MB
Transforming Oscilloscope Acquisitions for De-Embedding, Embedding and Simulating Channel Effects Covers fundamentals of understanding the design parameters, the various methods of data acquisition and implementing the results into a first-class design Application Note 2012-03-05	PDF 2.33 MB Sprachen English \| 2012-03-05 \| PDF 2.33 MB 中文（简体） \| 2012-03-05 \| PDF 2.33 MB 한국어 \| 2012-03-05 \| PDF 2.33 MB
S-parameter Series: S-parameter Requirements for Oscilloscope De-Embedding Applications A tutorial in helping the reader achieve the big picture of interoperating oscilloscope data and how to understand its relationship to S-parameters Application Note 2012-03-02	PDF 2.13 MB Sprachen English \| 2012-03-02 \| PDF 2.13 MB 中文（简体） \| 2012-03-02 \| PDF 2.13 MB 한국어 \| 2012-03-02 \| PDF 2.13 MB
S-parameter Series: Using the Time-Domain Reflectometer Application Note Time Domain Reflectometers provide digital designers with powerful tools that display traditional impedance measurements and solutions that generate accurate S-parameter measurements -for de-embedding Application Note 2012-03-01	PDF 3.69 MB Sprachen English \| 2012-03-01 \| PDF 3.69 MB 中文（简体） \| 2012-03-01 \| PDF 3.69 MB 한국어 \| 2012-03-01 \| PDF 3.69 MB

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