Digital Design & Interconnect Standards

Achieve your best design with Agilent. Investigate specific solutions for high speed standards plus solutions for your high-speed digital design cycle (design, simulation, analysis, debug compliance and signal integrity) challenges.

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- Oscilloscopes, Analyzers, Meters
  - Oscilloscopes (46)
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10 Hints for Getting the Most from your Frequency Counter Maximize the results you get from your frequency counter through 10 hints from better from understanding the architecture to making faster measurements. Application Note 2008-04-18	PDF 263 KB Languages English \| 2008-04-18 \| PDF 263 KB 中文（简体） \| 2008-07-01 \| PDF 575 KB 日本語 \| 2008-05-26 \| PDF 890 KB 中文（繁體） \| 2008-04-18 \| PDF 263 KB 한국어 \| 2008-04-18 \| PDF 263 KB
10 Reasons to Upgrade to a 16800 or 16900 Series Logic Analyzer 10 Reasons to Upgrade to a 16800 or 16900 Series Logic Analyzer Application Note 2007-12-03	PDF 999 KB Languages English \| 2007-12-03 \| PDF 999 KB 中文（简体） \| 2008-10-01 \| PDF 1.07 MB
6 Hints for Better SATA and SAS Measurements These 6 Hints for better SATA and SAS measurements cover Tx, Rx, Impedance and Return Loss, and Host/Device Digital testing challenges. Application Note 2012-02-02	PDF 1.59 MB
8 Hints for Debugging and Validating High-speed Buses 8 Hints for Debugging High-speed Buses Application Note 2002-03-05	PDF 2.24 MB
8 Hints for Debugging Siemens MCU-based Designs A new type of instrument, the mixed signal oscilloscope (MSO), closes the gap in MCU debugging tools. The Agilent 54645D from Hewlett-Packard combines two analog scope channels with 16 digital logic channels, so you can monitor analog and digital lines at the same time. This MSO offers more... Application Note 1998-11-01	PDF 736 KB
A Time-Saving Method for Analyzing Signal Integrity in DDR Memory Buses This application note covers new tools and measurement techniques for characterizing and validating signal integrity of DDR (double data rate synchronous dynamic random access memory) signals. Application Note 2008-09-10	PDF 792 KB Languages English \| 2008-09-10 \| PDF 792 KB 日本語 \| 2007-07-24 \| PDF 4.08 MB
Accurate Calibration of Receiver Stress Test Signals for PCI Express® Rev. 3.0 This paper describes the calibration of the receiver-stress signal according to the base specification of PCIe3. The calibration of the RX test signal is different from PCIe 2.0. Application Note 2011-06-22	PDF 4.82 MB Languages English \| 2011-06-22 \| PDF 4.82 MB 日本語 \| 2011-07-27 \| PDF 3.05 MB
Advanced Jitter Generation and Analysis Product Note This product note shows how the Agilent pulse generators can be used with the DCA-J Oscilloscope. Application Note 2004-10-04	PDF 549 KB
Advanced Techniques for PCIe 3.0 Receiver Testing-Paper Advanced Techniques for PCIe 3.0 Receiver Testing-Paper Application Note 2011-09-01	PDF 2.20 MB
Agilent Method of Implementation (MOI) for 10GBASE-T Ethernet Cable Tests Agilent Method of Implementation (MOI) for 10GBASE-T Cable Tests Using Agilent E5071C ENA Option TDR Application Note 2013-05-21	PDF 2.13 MB
Agilent Method of Implementation (MOI) for DisplayPort Cable-Connector Assembly Compliance Test Agilent Method of Implementation (MOI) for DisplayPort Cable-Connector Assembly Compliance Test Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2013-02-18	PDF 1.29 MB
Agilent Method of Implementation (MOI) for MHL Cables Compliance Tests Agilent Method of Implementation (MOI) for MHL Cable Compliance Tests Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2013-02-14	PDF 1.76 MB Languages English \| 2013-02-14 \| PDF 1.76 MB 日本語 \| 2013-02-14 \| PDF 1.76 MB
Agilent Method of Implementation (MOI) for MIPI D-PHY Conformance Tests Agilent Method of Implementation (MOI) for MIPI D-PHY Conformance Tests Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2011-12-01	PDF 920 KB
Agilent Method of Implementation (MOI) for MIPI M-PHY Conformance Tests Agilent Method of Implementation (MOI) for MIPI M-PHY Conformance Tests Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2011-12-01	PDF 918 KB
Agilent Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test Agilent Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2012-10-16	PDF 1.62 MB
Agilent Method of Implementation (MOI) for SATA RXTX Compliance Test Agilent Method of Implementation (MOI) for SATA RXTX Compliance Test Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2011-01-12	PDF 1.19 MB
Agilent Method of Implementation (MOI) for SATA SI Compliance Test Agilent Method of Implementation (MOI) for SATA SI Compliance Test Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2011-01-12	PDF 1.41 MB
Agilent Method of Implementation (MOI) for USB3.0 Cable-Connector Assembly Compliance Test Agilent Method of Implementation (MOI) for USB3.0 Cable-Connector Assembly Compliance Test Using Agilent E5071C ENA Network Analyzer Option TDR Application Note 2012-12-17	PDF 1.82 MB
An Overview of the Electrical Validation of 10BASE-T, 100BASE-TX, and 1000BASE-T The technology used in these ports, commonly known as “LAN” or “NIC” ports, is usually one of the 10BASE-T, 100BASE-TX, and 1000BASE-T standards or a combination of them. Application Note 2011-01-11	PDF 1.21 MB Languages English \| 2011-01-11 \| PDF 1.21 MB 日本語 \| 2008-10-02 \| PDF 5.96 MB
Application Note 1382-4: I/O System and Chip Validation in PCI and PCI-X Systems (AN 1382-4) Validation of computer systems and subsystems is becoming increasingly complex as input/output (I/O) systems and peripherals become more intelligent. The role of data-transfer is being delegated to the I/O systems instead of the CPU, causing data traffic to move in several directions... Application Note 2001-12-20	PDF 920 KB Languages English \| 2001-12-20 \| PDF 920 KB 日本語 \| 2002-04-03 \| PDF 489 KB
Application Note2: Verify if a device can stand all kinds of protocol variations Validating servers and workstations that contain various I/O systems, various peripherals and high and low-speed devices, has become a sophisticated task. If you are a validation engineer, you have to ensure that server products can stand all possible protocol variations; that corner cases... Application Note 2001-10-04	PDF 556 KB
Application Note4: Read and write register values of your device before a driver is available The Agilent PCI/PCI-X Exerciser, a combination of testcard and software, simplifies the task of reading values from (peek) and writing values into (poke) registers or memory before a driver is available. Aims of this Application Note To show how to access registers of a device before a... Application Note 2001-10-05	PDF 363 KB
Automated PCI Express Receiver Compliance Test and Characterization with N5990A This product note shows how to use the test automation software platform to verify and debug your PCI Express bus designs. As an example, a multi-lane add-in card is used. Application Note 2006-08-29	PDF 444 KB
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Software Platform: 8 pages Application Note 2007-01-31	PDF 272 KB
Benefits of using PCI Express 2.0. An overview of the main features and benefits of using PCI Express 2.0 Application Note 2008-10-17	PDF 764 KB

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