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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Agilent - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more 
 

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Fixturing and Fixture Removal for Multiport Devices with Non-Standard RF Interfaces Webcast 
Original broadcast March 11, 2014

Webcast - recorded

 
High Performance Logic Analysis Techniques 
Learn to use the 16700A series of Logic Analysis tools to observe and analyze not only one component but also many independent devices in a system.

Classroom Training

 
High-Sensitivity Current Measurements using an Oscilloscope Webcast 
Original broadcast April 17, 2013

Webcast - recorded

 
High-speed Oscilloscope Probing: Ensuring Maximum Performance and Signal Integrity 
Originally broadcast March 10, 2011

Webcast - recorded

 
How to Solve DDR Signal Integrity Validation Challenges 
How to Solve DDR Signal Integrity Validation Challenges

Training Materials 2008-02-13

 
Introduction to Digital RF Communications 
This course teaches the basics of vector modulation, effectively the basics of digital modulation.

Classroom Training

 
Keeping up with 10G USB 3.1 Physical Layer Test Challenges Webcast 
Original broadcast January 15, 2014

Webcast - recorded

 
Learn to Analyze, Validate and Debug High Speed DDR3 Memory 
Original broadcast Oct 4, 2011

Webcast - recorded

 
Logic Analysis Fundamentals for Computer Solutions 
Learn how to configure and use the 16700 series of logic analysis tools to design and debug digital systems in this logic analysis fundamentals course.

Classroom Training

 
Making Your Most Accurate DDR4 Compliance Measurements Webcast 
Originally broadcast January 23, 2013

Webcast - recorded

 
MIPI Physical Layer Transmitter Test Solutions Webcast 
Original broadcast April 2, 2014

Webcast - recorded

 
Navigating Compliance Standards Panel Discussion 
Original broadcast July 17, 2013

Webcast - recorded

 
Network Analysis Back to Basics Webcast 
Recorded broadcast August 21, 2013

Webcast

 
Network Analysis Basics for High Speed Digital Engineers Webcast 
Original broadcast July 30, 2013

Webcast - recorded

 
New impedance measurement solutions & apps using 5 Hz to 3 GHz VNA  
Originally broadcast April 19, 2011

Webcast - recorded

 
Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

Webcast - recorded

 
Optimizing PXI Modular Functional Test System Throughput Webcast 
Originally broadcast April 27, 2011

Webcast - recorded

 
Oscilloscope Measurements Webcast Series 
Live and on-demand broadcasts that will teach you how to make precise measurements with its Infiniium line of real-time and sampling oscilloscopes.

Webcast

 
PCI Express 3.0 Compliance - Successfully Navigating the Standard Webcast 
Original broadcast May 7, 2013

Webcast - recorded

 
PCI Express 3.0 How to pass receiver compliance test for add-in cards and motherboards - webcast 
Original broadcast October 27, 2011

Webcast - recorded

 
PCI Express 3.0 Receiver test of ASICs- how to face this challenge - webcast 
When PCIe 3.0 was generated, it was a goal to re-use the existing passive infrastructure - the channels. With nearly double the signal rate (8Gb/s vs. 5Gb/s), the error free transmission now heavily depends on the RX. Therefore it is now normati...

Webcast - recorded

 
PCI Express(R) 3.0 Strategies for Transmitter and Receiver Validation 
Originally broadcast Feb 10, 2011

Webcast - recorded

 
PCIe™ 3.0 Receiver Testing: How to Generate the Test Set-up and Calibrate the Stressed Eye 
Originally broadcast October 12, 2010

Webcast - recorded

 
Physical Layer design challenges for PCI Express® 3.0 and 2.0 designs 
You will learn advanced techniques for PCI Express phy-layer validation covering the latest PCIe 3.0 specification requirements as well as practical extensions to PCIe 2.0 and 1.1 designs. This seminar analyzes transmitter and receiver performance.

Webcast - recorded

 
Physical Layer Test Challenges and Solutions for MIPI Interfaces Webcast 
Original broadcast January 30, 2013

Webcast - recorded

 

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