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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Agilent - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more 
 

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Evénements Agilent en France 
Bienvenue sur la page des événements auxquels participe Agilent en France

Seminar

 
Automate Multilane Gigabit Oscilloscope Testing with Switch Matrix Webcast 
Original broadcast November 20, 2013

Webcast - recorded

 
DDR memory Characterization Using a Mixed Signal Oscilloscope Webcast 
Original broadcast October 16, 2013

Webcast - recorded

 
DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

Tradeshow

 
Digital and Photonics Webcast Series 
Originally broadcast 2010, 2011. Access the recordings of many broadcasts

Webcast - recorded

 
Digitizing Oscilloscope Fundamentals 
This class gives the student an in-depth understanding of the operation and measurement techniques with an Infiniium oscilloscope.

Classroom Training

 
DisplayPort 1.2 Physical Layer Testing 
Original broadcast October 30, 2012

Webcast - recorded

 
Driving Down Test Cost, Schedule & Risk with Smart Switching Webcast 
Original broadcast May 30, 2012

Webcast - recorded

 
How to Solve DDR Signal Integrity Validation Challenges 
How to Solve DDR Signal Integrity Validation Challenges

Training Materials 2008-02-13

 
MIPI Physical Layer Transmitter Test Solutions Webcast 
Original broadcast April 2, 2014

Webcast - recorded

 
PCI Express(R) 3.0 Strategies for Transmitter and Receiver Validation 
Originally broadcast Feb 10, 2011

Webcast - recorded

 
Physical Layer design challenges for PCI Express® 3.0 and 2.0 designs 
You will learn advanced techniques for PCI Express phy-layer validation covering the latest PCIe 3.0 specification requirements as well as practical extensions to PCIe 2.0 and 1.1 designs. This seminar analyzes transmitter and receiver performance.

Webcast - recorded

 
Practical Guide to 100G Electrical Compliance Testing Webcast 
Original broadcast August 28, 2013

Webcast - recorded

 
SuperSpeed USB 3.0 Validation and Compliance Testing Challenges 
Originally broadcast May 18, 2011;

Webcast - recorded

 
Test & Measurement events in Europe, Middle East & Africa 
Test & Measurement events in Europe, the Middle East, and Africa - seminars, trade shows, user group meetings, webcasts, tutorials and conferences.

Seminar

 
Tips to Debugging DDR 1, 2 and 3 Physical and Protocol Layer Issues webcast 

Training Materials 2009-01-06

 
Understanding DDR4 AC Timing Parametrics Webcast 
Original broadcast March 20, 2013

Webcast - recorded

 
USB 3.0 Physical Layer Test Challenges: Gen3 and Beyond Webcast 
Original broadcast June 13, 2013

Webcast - recorded