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Agilent embraces GaN modeling in IC-CAP upgrade 
EETimes Design Article highlights new capabilities in IC-CAP 2013.01.

專文 2013-01-09

 
An Innovative and Integrated Approach to III-V Circuit Design 
This article explains how to drive III-V circuit design improvement by unified modeling, Design of Experiments (DOE) simulation, and Pareto Analysis

專文 2011-01-10

PDF PDF 360 KB
An Innovative Approach to Faster RFIC Transmitter Design 
This Article by Andy Howard presents a number of simulation techniques; including HB, circuit envelope, EM, & wireless test benches applied to the integrated RFIC transceiver for WLANs/ IEEE 802.11b.

專文 2005-04-01

PDF PDF 3.68 MB
Boundary-Scan Advanced Diagnostic Methods 
This paper illustrates how usage of boundary scan circuit information and predictive analysis of potential assembly faults will provide more precise and accurate diagnostic information.

專文 2012-04-17

PDF PDF 1.20 MB
Comparing Boundary Scan Methods White Paper 
The need for reusable tests is driving standalone boundary scan-ICT integration. This article first appeared in the September 2009 issue of Circuits Assembly and is reprinted with kind permission.

專文 2010-06-09

PDF PDF 2.68 MB
Comparing In-house and Commercial Load Solutions for Automotive Test 

專文 2012-07-17

 
Digital Predistortion Linearizes Wireless Power Amplifiers 
This Article by Wan-Jong Kim, Shawn P. Stapleton, Jong Heon Kim, and Cory Edelman focuses on how digital predistortion linearizes wireless power amplifiers.

專文 2005-09-01

PDF PDF 1.75 MB
Effective IM2 Estimation for Two-Tone and WCDMA Modulated Blockers in Zero-IF 
This Article written by Walid Y. Ali-Ahmad explains effective IM2 estimation for two-tone and WCDMA modulated blockers in zero-IF.

專文 2004-04-01

PDF PDF 306 KB
Future Device Modeling Trends 
Modeling the nonlinear device (basic nonlinear component) for circuit and system simulation downstream.

專文 2012-11-28

PDF PDF 6.08 MB
Limited Access Tools Improve Test Coverage 
Smaller test pads and shrinking board sizes are posing new challenges, and driving innovations to overcome limited access with new test solutions. Agilent Boundary Scan, 1149.6, 1149.1, bead probes, cover-extend

專文 2010-10-20

PDF PDF 275 KB
Link Measurements to Nonlinear Bipolar Device Modeling 
This Article explains that the dynamic thermal bipolar model can be developed through evaluation of device thermal resistance and capacitance.

專文 1996-02-01

PDF PDF 1.58 MB
Overview: Applying Nonlinear RF Device Modeling to Verify S-Parameter Linearity 
This Article is intended to explain the basics of “what’s behind S-parameters” from a modeling engineer's standpoint & on how to apply Harmonic Balance simulators to check the validity of device models.

專文 2001-09-01

PDF PDF 460 KB
Principal Component Analysis-Based Compensation for Measurement Errors 
This paper examines some issues and trends that justify adding features to IEEE 1149.1 that will facilitate safe, fast and effective initialization of a board or system, to get it ready for testing. Published with kind permission of the IEEE

專文 2010-12-10

PDF PDF 1.10 MB
RF Device Modeling for Successful High-Frequency Design Challenges 
This Article by Joe Civello focuses on challenges associated with creating accurate high-frequency device models; proposes a process for extracting accurate models necessary for successful HF design.

專文 2004-01-01

PDF PDF 2.26 MB
Solutions for Undetected Shorts on IEEE 1149.1 Self-Monitoring Pins 
This paper presents the problem of undetected shorts on IEEE 1149.1 compliant self-monitoring pins, and potential mitigating solutions.

專文 2010-12-10

PDF PDF 789 KB
Surviving State Disruptions Caused by Test: the "Lobotomy Problem" 
This paper examines some issues and trends that justify adding features to IEEE 1149.1 that will facilitate safe, fast and effective initialization of a board or system, to get it ready for testing. Published with kind permission of the IEEE

專文 2010-12-10

PDF PDF 402 KB
Testing DDR Memory; How On-Chip DFT Helps 
This paper discusses DDR memory testing challenges we see today, and how the adoption of DFT capabilities pays off in higher test coverage, better diagnostics and reduced programming/support time.

專文 2012-04-17

PDF PDF 530 KB
The Proposed IEEE Test Standards 
There is a resurgence of interest in Boundary Scan and Built in Self Test (BIST) initiatives to be part of IEEE standards. This article explains the IEEE standard and their benefits to the industry. Agilent Boundary Scan, 1149.6, 1149.1, bead probes, cover-extend

專文 2010-10-20

PDF PDF 2.83 MB
The Use of Intermodulation Tables (IMT) for Mixer Simulation 
An Article on the usage of how intermodulation table (IMT) files can lead to accurate prediction of the output frequency content of an up-converting or down-converting mixer in system simulation.

專文 2002-04-01

PDF PDF 177 KB
X-Parameters: Commercial Implementations for the Latest Technology Enable Mainstream Applications 
This article reprint from Microwave Journal introduces advances in commercially available solutions for characterization, modeling, and design of nonlinear components and systems based on X-parameters

專文 2009-10-09

PDF PDF 1.92 GB