High-Speed Digital
- Design & Simulation: Download the Quick Start Guide
- Analysis & Debug: Download the Debugging application note
- Compliance: Visit the compliance web page
- Signal Integrity: Link to the PLTS technical overview
In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.
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Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.
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1-25 of 26
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6 Hints for Better SATA and SAS Measurements
These 6 Hints for better SATA and SAS measurements cover Tx, Rx, Impedance and Return Loss, and Host/Device Digital testing challenges.
Application Note 2012-02-02 |
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1.59 MB
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Comparison of Different Jitter Analysis Techniques With a Precision Transmitter
This white paper describes how various jitter analysis techniques give dissimilar results. Which is right? We built a precision jitter transmitter to compare results of different techniques where test sets were exposed to known levels of jitter.
Application Note 2006-04-06 |
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164 KB
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Crossing the Digital-Analog Divide - White Paper
This white paper helps to better understand how to cope with the physical nature of signals that we might prefer to think of as bits, nibbles and bytes, let's start with an ideal digital waveform.
Application Note 2012-05-02 |
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6.46 MB
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Debugging USB 2.0: It's Not Just A Digital World (AN 1382-3)
Debugging USB 2.0 Systems
Application Note 2006-10-05 |
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Designing and Validating High-Speed Memory Buses (AN 1382-2)
DDR SDRAM (double data rate synchronous dynamic random access memory) is quickly becoming an accepted technology in the PC (personal computer) industry. Its low cost, high performance, and increasingly wide availability make it very desirable for PC memory buses and embedded designs such as high...
Application Note 2001-12-20 |
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1.51 MB
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Designing High Speed Backplanes Utilizing Physical Layer Test System
This Application Note focuses on the problems introduced into the backplane assembly design by the many linear passive components that create reflections due to impedance discontinuities.
Application Note 2006-01-18 |
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Effective Reflection Characterization for Active Devices Using ENA Option TDR Application Note
This application note describes Hot TDR measurement, which is an effective characterization method for the reflection of transmitter and receiver.
Application Note 2012-01-12 |
PDF
416 KB
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Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow
Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow.
Application Note 2012-09-21 |
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467 KB
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Frequency Domain Analysis of Jitter Amplification in Clock Channels
Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained.
Application Note 2012-11-01 |
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257 KB
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How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)
Application Note 2007-07-30 |
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611 KB
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Improve Your Time-to-Insight:Debugging Intermittent Memory Failures in DDR and DDR2 Systems
Application Note 1575
Application Note 2006-04-14 |
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120 KB
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Improving Usability and Performance in High-Bandwidth Active Oscilloscope Probes (AN 1419-02)
Understand how to get minimal probe loading and highest-possible-performance representation of your signal.
Application Note 2002-11-01 |
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Limitations and Accuracies of Time and Frequency Domain Analysis of Physical Layer Devices
Application Note 2005-11-01 |
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2.83 MB
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Measurement Uncertainty of VNA based TDR/TDT Measurement Application Note
This application note explains the theory of measurement uncertainty in TDR/TDT measurement with the ENA Option TDR.
Application Note 2011-07-08 |
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1.77 MB
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Planning Your Design for Debug: FPGA Dynamic Probe
Application Note 2005-01-26 |
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Precision Jitter Analysis Using the Agilent 86100C DCA-J (PN 86100C-1)
This product note provides a guide to making jitter measurements with the Agilent 86100C DCA-J.
Application Note 2007-03-07 |
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1.64 MB
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Signal Integrity Analysis Series Part 1: Single-Port TDR, TDR/TDT, & 2-Port TDR
This Application Note focuses on part 1: those which use a single-port TDR, those which use TDR/TDT, and those which use 2-port TDR.
Application Note 2007-01-01 |
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3.50 MB
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Signal Integrity Analysis Series Part 2: 4-Port TDR/VNA/PLTS
This Application Note focuses on part 2: those which use a 4-port TDR/VNA/PLTS.
Application Note 2007-02-21 |
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2.75 MB
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Signal Integrity Analysis Series Part 3: The ABCs of De-Embedding
This Application Note focuses on Part 3: The ABCs of De-Embedding explaining different de-embedding techniques & shows how to minimize fixture effects for best results.
Application Note 2007-07-01 |
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2.44 MB
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Simulating FPGA Power Integrity Using S-Parameter Models
This application note describes how self-impedance (frequency) can easily be determined by simulating the frequency domain self-impedance profile of a Power Distribution Network (PDN).
Application Note 2012-04-02 |
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5.68 MB
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Simulating High-Speed Serial Channels with IBIS-AMI Models
This paper reviews some of the benefits and limitations of using IBIS models and introduces the new AMI extensions to the latest IBIS version 5.0 specification.
Application Note 2011-11-15 |
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USB 2.0 Compliance Testing with Infiniium Oscilloscopes - Application Note
This Application Note discusses the Agilent solution for the USB 2.0 test suite. The Agilent solution is the only one-box solution that uses the official USB-IF scripts for precompliance ans compliance testing.
Application Note 2013-05-10 |
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2.02 MB
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Using ADS for Signal Integrity Optimization
This white paper shows how to replace a multi-dimensional sweep of a long running PRBS time-domain simulation (including manual data evaluation) by short, channel-pulse characterization in the Advanced Design System to efficiently optimize a channel.
Application Note 2009-10-19 |
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275 KB
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Using Clock Jitter Analysis to Reduce BER in Serial Data Applications
This Application Note emphasizes on the emerging techniques for reference clock jitter analysis from the perspective of oscillator physics, phase noise theory, and serial data technology.
Application Note 2006-12-01 |
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1.15 MB
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Using Equalization Techniques on Your Infiniium 90000A Series Oscilloscope
A transmitter sends a serial signal over a transmission channel (examples: backplane, cable) to a receiver. As the signal rate increases, the channel the signal travels through distorts the signal at the receiver.
Application Note 2009-02-17 |
PDF
479 KB
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