High-Speed Digital Analysis
Perform detailed characterization with powerful analysis tools
Most serial data links begin and end with high-speed ICs designed for standards-compliant interoperability. As bit rates increase, the margins for jitter, interference and other imperfections make it increasingly difficult to achieve BER of less than 10-12. The following tools will help you characterize and analyze your designs in detail. Agilent - achieve your best design.
Refine the List
By Type of Content
Nach Produkt Kategorie
1-3 of 3
Characterizing Clock Jitter through Phase Noise Measurements Speeds up Design Verification Process
This white paper discusses a new measurement method for obtaining highly accurate low random jitter (RJ) measurements and performing real-time analysis of RJ and periodic jitter (PJ) of components.
Application Note 2008-11-20
Optimizing VCO/PLL evaluations and PLL synthesizer designs AN 1330-1
This application note clarifies the role and performance requirements of the synthesized oscillator used in wireless communication equipment, and introduces our test solution for VCO/PLL evaluation.
Application Note 2000-09-01
Using Clock Jitter Analysis to Reduce BER in Serial Data Applications
This Application Note emphasizes on the emerging techniques for reference clock jitter analysis from the perspective of oscillator physics, phase noise theory, and serial data technology.
Application Note 2006-12-01