高速數位解決方案
每一代數位標準的變化,都會帶來新的產品設計風險。藉由與業界專家以及像您這樣的工程師共同合作,我們得以取得第一手資訊並順利開發產品。 安捷倫高速數位測試解決方案建構於我們不斷與業界專家進行溝通交流的量測技術與專業知識之上。 藉由與您分享我們最先進的量測專業知識,安捷倫可協助您順利克服挑戰,並且加速推出傲視業界的產品。安捷倫是協助您實現最佳設計的推手。
瀏覽整個設計周期
請瀏覽產品網頁,以便觀看並尋找在設計週期的四個階段以及執行重要的信號完整度分析所需的解決方案。
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案例研究:克服 DDR3/GDDR5 記憶體控制器封裝中回返路徑不連續的問題
原始播放時間為 2011 年 10 月 13 日
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Astonishing Enhancements to Signal Integrity EDA Tools Using Video Game 3D Glasses and GPUs
Originally broadcast Jan 21, 2010
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Ethernet Compliance Testing: Become More Green and Energy Efficient Webcast
Original broadcast March 20, 2013
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Genesys Webcasts - "How-To-Design" series
Originally broadcast in 2009. Access the 6 WebEX recordings
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High-Sensitivity Current Measurements using an Oscilloscope Webcast
Original broadcast April 17, 2013
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IMS 2011 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
2011 show, last June, 2011; Baltimore Convention Center
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IMS 2012 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
June 17-22, 2012 in Montréal, Canada
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IMS 2013 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
June 2 - 7, 2013 in Seattle, WA
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Innovations in EDA: Multi-Technology RF Design Using the New Advances in ADS 2011
Originally broadcast March 1, 2011
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Innovations in EM Simulation for High Speed Digital Design
Originally broadcast Nov 18, 2010; Part of the Series: Signal Integrity for High Speed Digital Interconnects.
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Is Simulation a Requirement for Memory Designs Webcast
Live broadcast February 20, 2013; 10am Pacific / 1pm Eastern
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Modeling Optical Fiber Communication with Channel Simulation Webcast
Live broadcast March 6, 2013; 10am Pacific / 1pm Eastern
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Overcome PI Challenges on Perforated Power/Groung Planes
This presentation explains a different approach that's applicable to PI analysis on cost reduced consumer boards whose power/ground planes are perforated with signal traces.
研討會講義 2012-01-19 |
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Signal Integrity Design Using Channel Simulation and EM Co-design
The materials in this self-guided workshop will show you the “what if” design space exploration workflow that our new statistical eye diagram channel simulator enables
研討會講義 2010-04-21 |
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Signal Integrity: Include Post-layout PCB Artwork into your Eye Diagram and BER Contour Simulation
Originally broadcast May 5, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.
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Successful High Speed Digital Design with ADS, EMPro, and SystemVue
The materials in this self-guided workshop will show you the latest high speed digital capabilites in ADS 2011.
研討會講義 2011-09-29 |
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Understanding Cross Modulation Effects in a Full Duplex LTE Transceiver
Originally broadcast July 22, 2010
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Using IBIS AMI Models as ‘Executable Data sheets’ in High Speed Digital Interconnect Simulations
Originally broadcast Sept 9, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.
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What on Earth is Jitter Amplification, and Why Should I Care Webcast
Original broadcast April 9, 2013
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