RF 및 마이크로웨이브

Design and Measurement of a 400 MHz Frequency Synthesizer: Accuracy Proof This Application Note explains the 400 MHz PLL design with examples and hence giving the engineer a powerful effective tool for designing real PLLs. 어플리케이션 노트 2001-11-01	PDF 1.22 MB 언어 English \| 2001-11-01 \| PDF 1.22 MB 中文（简体） \| 2001-11-05 \| PDF 1.22 MB
PLL’s using a Charge Pump, High Divide-by-N Factors, and Decimation before Plotting This Application Note shows an approach for designing a phase locked loop (PLL) that uses a charge pump, High Divide-by-N Factors, and Decimation before Plotting. 어플리케이션 노트 2001-03-20	PDF 316 KB 언어 English \| 2001-03-20 \| PDF 316 KB 中文（简体） \| 2001-03-20 \| PDF 316 KB