Phase-Locked Loops (PLL)
Design, synthesize, and simulate phase-locked loops (PLL) and frequency synthesizers with a comprehensive array of design and simulation tools. Make sure that critical performance goals can be achieved and reliably manufactured. Critical characteristics such as settling time and phase noise can be investigated and optimized for superior performance using Agilent's EDA software products such Advanced Design System (ADS), GoldenGate RFIC Simulator and/or Genesys.
After your design is complete, Agilent's test and measurement equipment, such as Signal Source Analyzer, Oscilloscopes and Spectrum Analyzers, can help you measure and verify your prototype and products.
The E5052B SSA Signal Source Analyzer provides fast and accurate measurements for PLL/VCO design and manufacturing, and contributes to producing high-quality profitable products with a shorter lead time. Phase noise, AM noise, Lockup time, VCO tuning performance, Harmonics, DC supply noise, you can evaluate all with this one box solution.
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Boosting PLL Design Efficiency From free-running VCO characterizations to closed-loop PLL evaluation
This application note describes introduces practical solutions for VCO/PLL performance evaluation and gives actual examples of parameter measurements using the E5052B.
Application Note 2008-11-21
Characterizing phase-locked-loop signal transition behaviors of Microphonic/Phase-hit
This paper discusses how Agilent's Signal Source Analyzer helps you to identify unwanted phase-locked-loop transition "phase-hits", and achieve easy, comprehensive and accurate phase-locked-loop characterization in both linear and nonlinear regions.
Application Note 2008-10-02
Optimizing VCO/PLL evaluations and PLL synthesizer designs AN 1330-1
This application note clarifies the role and performance requirements of the synthesized oscillator used in wireless communication equipment, and introduces our test solution for VCO/PLL evaluation.
Application Note 2000-09-01