Phase-Locked Loops (PLL)
Design, synthesize, and simulate phase-locked loops (PLL) and frequency synthesizers with a comprehensive array of design and simulation tools. Make sure that critical performance goals can be achieved and reliably manufactured. Critical characteristics such as settling time and phase noise can be investigated and optimized for superior performance using Agilent's EDA software products such Advanced Design System (ADS), GoldenGate RFIC Simulator and/or Genesys.
After your design is complete, Agilent's test and measurement equipment, such as Signal Source Analyzer, Oscilloscopes and Spectrum Analyzers, can help you measure and verify your prototype and products.
The E5052B SSA Signal Source Analyzer provides fast and accurate measurements for PLL/VCO design and manufacturing, and contributes to producing high-quality profitable products with a shorter lead time. Phase noise, AM noise, Lockup time, VCO tuning performance, Harmonics, DC supply noise, you can evaluate all with this one box solution.
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1-10 of 10
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Advanced Design System 2009U1 Fundamentals
This medium-paced, 3-day course provides detailed introduction to the application of Advanced Design System for communication systems and circuit designs. Click on link to view full course description and class dates and locations.
Classroom Training |
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Agilent EEsof EDA Training Course Calendar - 2013
Scheduled courses for the United States and Canada
Classroom Training |
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Agilent EEsof EDA Customer Education and Services
Brief overview of Agilent EEsof EDA Customer Education and Services.
Training Materials 2010-08-11 |
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Ethernet Compliance Testing: Become More Green and Energy Efficient Webcast
Original broadcast March 20, 2013
Webcast - recorded |
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Presentation on 3GPP RF System Simulation
This Presentation presents concept and introduction to 3G W-CDMA Design with the Advanced Design System (ADS) and Simulation Technologies.
Seminar Materials 2001-09-01 |
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Presentation on Accurate Design of Low-Noise High-Frequency SAW Oscillators
This Presentation presents design steps which include the necessary measurements and modeling methods and the used simulation technologies in the Advanced Design System (ADS) to achieve the goal.
Seminar Materials 2001-09-01 |
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Presentation on Amplifier Design and Performance Testing
This Presentation presents a design flow to create the circuit design for the Power Amplifier with the assistance of the two DesignGuides (Passive Circuit and Power Amplifier), which are new in ADS 1.3.
Seminar Materials 2000-11-01 |
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Presentation on RF Circuits Integration using CMOS SOI 0.25μm Technology
This Presentation presents a brief overview of the Silicon On Insulator (SOI) technology and also introduces two RF designs performed successfully with 0.25μm SOI technology.
Seminar Materials 2002-03-01 |
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Presentation on RF System-in-Package Design in ADS
This Presentation by HeeSoo LEE (Agilent EEsof) presents an overview of RF System-in-Package (SiP) technology and also demonstrates ADS simulation capabilities for RF module applications.
Seminar Materials 2004-03-12 |
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Presentation on Simulating Phase Locked Loops using ADS
This Presentation details PLL simulation using ADS, Envelope simulation, PLL component behavioral modeling, Phase noise, Spurs, Fractional N-simulation and Divide ratio using sigma delta modulator.
Seminar Materials 2010-08-19 |
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