Phase-Locked Loops (PLL)
Design, synthesize, and simulate phase-locked loops (PLL) and frequency synthesizers with a comprehensive array of design and simulation tools. Make sure that critical performance goals can be achieved and reliably manufactured. Critical characteristics such as settling time and phase noise can be investigated and optimized for superior performance using Agilent's EDA software products such Advanced Design System (ADS), GoldenGate RFIC Simulator and/or Genesys.
After your design is complete, Agilent's test and measurement equipment, such as Signal Source Analyzer, Oscilloscopes and Spectrum Analyzers, can help you measure and verify your prototype and products.
The E5052B SSA Signal Source Analyzer provides fast and accurate measurements for PLL/VCO design and manufacturing, and contributes to producing high-quality profitable products with a shorter lead time. Phase noise, AM noise, Lockup time, VCO tuning performance, Harmonics, DC supply noise, you can evaluate all with this one box solution.
Affiner la liste
Par type de contenu
Par catégorie de produit
1-3 sur 3
Advanced Design System 2009U1 Fundamentals
This medium-paced, 3-day course provides detailed introduction to the application of Advanced Design System for communication systems and circuit designs. Click on link to view full course description and class dates and locations.
Formation en classe
Combining the Power of RF & Microwave with High Speed Digital Seminar Materials
Access the papers from the 2012 Seminar
Genesys Webcasts - "How-To-Design" series
Originally broadcast in 2009. Access the 6 WebEX recordings
Webcast - enregistré