数字和模拟设计

改善查看周期:调试DDR和DD2系统中的间歇应用说明 2006-05-01	PDF 5.93 MB 语言 English \| 2006-04-14 \| PDF 120 KB 中文（简体） \| 2006-05-01 \| PDF 5.93 MB
A Time-Saving Method for Analyzing Signal Integrity in DDR Memory Buses This application note covers new tools and measurement techniques for characterizing and validating signal integrity of DDR (double data rate synchronous dynamic random access memory) signals. 应用说明 2008-09-10	PDF 792 KB 语言 English \| 2008-09-10 \| PDF 792 KB 日本語 \| 2007-07-24 \| PDF 4.08 MB
Crossing the Digital-Analog Divide - White Paper This white paper helps to better understand how to cope with the physical nature of signals that we might prefer to think of as bits, nibbles and bytes, let's start with an ideal digital waveform. 应用说明 2012-05-02	PDF 6.46 MB
Designing and Validating High-Speed Memory Buses (AN 1382-2) DDR SDRAM (double data rate synchronous dynamic random access memory) is quickly becoming an accepted technology in the PC (personal computer) industry. Its low cost, high performance, and increasingly wide availability make it very desirable for PC memory buses and embedded designs such as high... 应用说明 2001-12-20	PDF 1.51 MB 语言 English \| 2001-12-20 \| PDF 1.51 MB 日本語 \| 2002-04-04 \| PDF 633 KB