DDR Memory Design & Test
Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) is implemented in several forms today – the original DDR (also called DDR1), DDR2 which improved performance and lowered power consumption, DDR3 with even better performance, and low-power DDR (LPDDR), that is targeted for mobile devices.
Agilent is an active member of JEDEC, with consistent participation in workshops and specification issues. These resources you find here will provide you with an overview of DDR design, understand the latest measurement techniques, and illustrate design and debug approaches.
Use the matrix below to discover specific solutions for your DDR needs.
|Simulation||Functional Test (Oscilloscope)||Validation (Logic Analyzers)||Probing Solutions|
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1-4 of 4
Learn to Analyze, Validate and Debug High Speed DDR3 Memory
Original broadcast Oct 4, 2011
Webcast - recorded
Agilent Veranstaltungs-Webseite für Deutschland
Willkommen zur neuen Agilent Veranstaltungs-Webseite für Deutschland
Test & Measurement events in Europe, Middle East & Africa
Test & Measurement events in Europe, the Middle East, and Africa - seminars, trade shows, user group meetings, webcasts, tutorials and conferences.
Boundary Scan for Testing On-Board DDRs Webcast
Original broadcast October 22, 2013
Webcast - recorded