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DDR Memory Design & Test

Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) is implemented in several forms today – the original DDR (also called DDR1), DDR2 which improved performance and lowered power consumption, DDR3 with even better performance, and low-power DDR (LPDDR), that is targeted for mobile devices.

Agilent is an active member of JEDEC, with consistent participation in workshops and specification issues. These resources you find here will provide you with an overview of DDR design, understand the latest measurement techniques, and illustrate design and debug approaches.

Use the matrix below to discover specific solutions for your DDR needs.

  Simulation Functional Test (Oscilloscope) Validation (Logic Analyzers) Probing Solutions
DDR2 Learn more                Learn more                Learn more       Learn more
DDR3 Learn more                Learn more                Learn more       Learn more
DDR4   Planned                Learn more                Learn more  
LPDDR2 Learn more                Learn more                Learn more  
LPDDR3   Planned                Learn more                Learn more  
GDDRS   Planned                Learn more    
UFS                  Learn more    

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DDR Memory Design and Test Overview  
Brief overview of Agilent solutions for DDR design and test.

Brochure 2012-12-19

PDF PDF 1.14 MB
DDR Memory Design and Test – A Better Way 
Agilent offers the complete solutions for all areas of DDR design, meeting your needs for electrical physical layer, protocol layer, and functional test.

Brochure 2012-12-19

PDF PDF 5.17 MB
Jitter Solutions for Telecom, Enterprise, and Digital Designs 
Complete solutions for characterization and test of jitter in high-speed digital transmission systems, high-speed I/O connections, and buses.

Brochure 2008-06-25

PDF PDF 3.49 MB