Phase-Locked Loops (PLL)
Design, synthesize, and simulate phase-locked loops (PLL) and frequency synthesizers with a comprehensive array of design and simulation tools. Make sure that critical performance goals can be achieved and reliably manufactured. Critical characteristics such as settling time and phase noise can be investigated and optimized for superior performance using Agilent's EDA software products such Advanced Design System (ADS), GoldenGate RFIC Simulator and/or Genesys.
After your design is complete, Agilent's test and measurement equipment, such as Signal Source Analyzer, Oscilloscopes and Spectrum Analyzers, can help you measure and verify your prototype and products.
The E5052B SSA Signal Source Analyzer provides fast and accurate measurements for PLL/VCO design and manufacturing, and contributes to producing high-quality profitable products with a shorter lead time. Phase noise, AM noise, Lockup time, VCO tuning performance, Harmonics, DC supply noise, you can evaluate all with this one box solution.
1-4 of 4
ADS Videos on YouTube
Advanced Design System (ADS) Video Library playlist in Agilent EEsof EDA's Channel on YouTube
A collection of Agilent EEsof EDA Genesys video demonstrations and tutorials
ADS 2011 Videos Debut on YouTube
A collection of Advanced Design System 2011 video demonstrations and tutorials
A collection of Agilent EEsof EDA ADS video demonstrations and tutorials