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Agilent EEsof EDAユーザ向けメールマガジン -- しみゅレター 
アジレントEDAソリューションの技術情報やアプリケーション情報を定期的にお知らせするEメールニュースレターです。

ニュースレター 2013-04-17

 
Agilent embraces GaN modeling in IC-CAP upgrade 
EETimes Design Article highlights new capabilities in IC-CAP 2013.01.

記事 2013-01-09

 
Future Device Modeling Trends 
Modeling the nonlinear device (basic nonlinear component) for circuit and system simulation downstream.

記事 2012-11-28

PDF PDF 6.08 MB
Enabling Fast Characterization of PA Performance with Modulated Signals 
Microwave Product Digest (MPD) featured article written by Agilent Technologies' Andy Howard.

雑誌記事 2012-10-15

 
Comparing In-house and Commercial Load Solutions for Automotive Test 

記事 2012-07-17

 
Testing DDR Memory; How On-Chip DFT Helps 
This paper discusses DDR memory testing challenges we see today, and how the adoption of DFT capabilities pays off in higher test coverage, better diagnostics and reduced programming/support time.

記事 2012-04-17

PDF PDF 530 KB
Boundary-Scan Advanced Diagnostic Methods 
This paper illustrates how usage of boundary scan circuit information and predictive analysis of potential assembly faults will provide more precise and accurate diagnostic information.

記事 2012-04-17

PDF PDF 1.20 MB
An Innovative and Integrated Approach to III-V Circuit Design 
This article explains how to drive III-V circuit design improvement by unified modeling, Design of Experiments (DOE) simulation, and Pareto Analysis

記事 2011-01-10

PDF PDF 360 KB
Principal Component Analysis-Based Compensation for Measurement Errors 
This paper examines some issues and trends that justify adding features to IEEE 1149.1 that will facilitate safe, fast and effective initialization of a board or system, to get it ready for testing. Published with kind permission of the IEEE

記事 2010-12-10

PDF PDF 1.10 MB
Solutions for Undetected Shorts on IEEE 1149.1 Self-Monitoring Pins 
This paper presents the problem of undetected shorts on IEEE 1149.1 compliant self-monitoring pins, and potential mitigating solutions.

記事 2010-12-10

PDF PDF 789 KB
Surviving State Disruptions Caused by Test: the "Lobotomy Problem" 
This paper examines some issues and trends that justify adding features to IEEE 1149.1 that will facilitate safe, fast and effective initialization of a board or system, to get it ready for testing. Published with kind permission of the IEEE

記事 2010-12-10

PDF PDF 402 KB
The Proposed IEEE Test Standards 
There is a resurgence of interest in Boundary Scan and Built in Self Test (BIST) initiatives to be part of IEEE standards. This article explains the IEEE standard and their benefits to the industry. Agilent Boundary Scan, 1149.6, 1149.1, bead probes, cover-extend

記事 2010-10-20

PDF PDF 2.83 MB
Limited Access Tools Improve Test Coverage 
Smaller test pads and shrinking board sizes are posing new challenges, and driving innovations to overcome limited access with new test solutions. Agilent Boundary Scan, 1149.6, 1149.1, bead probes, cover-extend

記事 2010-10-20

PDF PDF 275 KB
X-parameters Aid MMIC Design 
Microwaves & RF article on how models based X-parameters can provide insights into the linear and nonlinear behavior of key components in wireless systems, including power amplifiers and mixers.

雑誌記事 2010-07-30

 
Comparing Boundary Scan Methods White Paper 
The need for reusable tests is driving standalone boundary scan-ICT integration. This article first appeared in the September 2009 issue of Circuits Assembly and is reprinted with kind permission.

記事 2010-06-09

PDF PDF 2.68 MB
Follow Agilent EEsof EDA on Twitter! 
Twitter enables you to keep current on news and updates with Agilent EEsof through the exchange of quick, frequent answers to one simple question: What are you doing?

ニュースレター 2010-03-04

 
Accelerating Advanced Node CMOS RFIC Design 
Microwave Journal article by David Vye

雑誌記事 2009-12-07

 
X-Parameters: Commercial Implementations for the Latest Technology Enable Mainstream Applications 
This article reprint from Microwave Journal introduces advances in commercially available solutions for characterization, modeling, and design of nonlinear components and systems based on X-parameters

記事 2009-10-09

PDF PDF 1.92 GB
Quick ACPR Analysis Performs Necessary PA Simulations 
This article describes a fast method of simulating Adjacent Channel Power Ratio (ACPR) versus input (or output) power level, based on a swept 1-tone harmonic balance simulation.

雑誌記事 2006-07-01

 
Digital Predistortion Linearizes Wireless Power Amplifiers 
This Article by Wan-Jong Kim, Shawn P. Stapleton, Jong Heon Kim, and Cory Edelman focuses on how digital predistortion linearizes wireless power amplifiers.

記事 2005-09-01

PDF PDF 1.75 MB
An Innovative Approach to Faster RFIC Transmitter Design 
This Article by Andy Howard presents a number of simulation techniques; including HB, circuit envelope, EM, & wireless test benches applied to the integrated RFIC transceiver for WLANs/ IEEE 802.11b.

記事 2005-04-01

PDF PDF 3.68 MB
Effective IM2 Estimation for Two-Tone and WCDMA Modulated Blockers in Zero-IF 
This Article written by Walid Y. Ali-Ahmad explains effective IM2 estimation for two-tone and WCDMA modulated blockers in zero-IF.

記事 2004-04-01

PDF PDF 306 KB
RF Device Modeling for Successful High-Frequency Design Challenges 
This Article by Joe Civello focuses on challenges associated with creating accurate high-frequency device models; proposes a process for extracting accurate models necessary for successful HF design.

記事 2004-01-01

PDF PDF 2.26 MB
The Use of Intermodulation Tables (IMT) for Mixer Simulation 
An Article on the usage of how intermodulation table (IMT) files can lead to accurate prediction of the output frequency content of an up-converting or down-converting mixer in system simulation.

記事 2002-04-01

PDF PDF 177 KB
Overview: Applying Nonlinear RF Device Modeling to Verify S-Parameter Linearity 
This Article is intended to explain the basics of “what’s behind S-parameters” from a modeling engineer's standpoint & on how to apply Harmonic Balance simulators to check the validity of device models.

記事 2001-09-01

PDF PDF 460 KB

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