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Digital Design & Interconnect Standards

Achieve your best design with Agilent. Investigate specific solutions for high speed standards plus solutions for your high-speed digital design cycle (design, simulation, analysis, debug compliance and signal integrity) challenges.

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Agilent EEsof EDA Newsletter - Product and Application News 
Keep tabs on the latest product and application news and review the archives of the Agilent EEsof EDA Newsletter.

Bulletin d'information 2013-05-14

 
Exploring The Test Requirements For DisplayPort Receivers 
Exploring The Test Requirements For DisplayPort Receivers

Article 2008-01-28

PDF PDF 543 Bytes
Follow Agilent EEsof EDA on Twitter! 
Twitter enables you to keep current on news and updates with Agilent EEsof through the exchange of quick, frequent answers to one simple question: What are you doing?

Bulletin d'information 2010-03-04

 
Inphi Delivers Memory Interface Chip for DDR3-1600 Using Advanced Design System 
This Success Story details how Inphi delivered memory interface chip for DDR3-1600 using Agilent’s Advance Design System (ADS).

Étude de cas 2009-03-12

PDF PDF 196 KB
Partner article using ADS: Practical Fiber Weave Effect Modeling -- Lamsim Enterprises, Inc. 
Partner article using ADS: Practical Fiber Weave Effect Modeling -- Lamsim Enterprises, Inc.

Article 2011-01-11

 
Practical Analysis of Backplane Vias - White Paper 
This paper describes the methodology of using measurements on a test vehicle to build a high bandwidth, scalable model of long vias which includes the through and stub effects which can be used for system simulation.

Étude de cas 2009-04-20

PDF PDF 847 KB
S-parameters Without Tears 
This article explains s-parameter theory and shows how to create accurate, delay-causal, and passive time-domain models by combining band-limited s-parameter data with knowledge about the physical characteristics of a component.

Journal 2010-01-25

 
Signal Integrity Analysis and Simulation Tools include IBIS Models 
This Article describes the types of models that need to be taken together for high-speed signal integrity analysis, and illustrates their use in a simulation of a high-speed memory circuit.

Article 2004-09-01

PDF PDF 411 KB
Signal Integrity Simulation of PCI Express Gen 2 Channel 
Article reprint from XrossTalk Magazine, Janurary 2009, author Jason Boh.

Article 2009-03-23

PDF PDF 1.81 MB
Swimming in the channel 
Signal-integrity problems can come back to bite you if you're not careful. Specialized software keeps the sharks away. Link to EDN magazine 3/18/2010 to read an article by their Technical Editor.

Article 2010-03-18