PCIe 2.0/3.0、PCI Express® 的設計與測試資訊資源中心
快速周邊元件互連協定的正式縮寫為 PCIe® 或 PCI Express®，是一種電腦擴充匯流排標準，可取代較舊的匯流排標準，如 PCI。
PCIe 2.0 版能使資料傳輸率增加一倍至 5 Gb/s，每通道的傳輸速率從 250 MB/s 上升至 500 MB/s。
安捷倫是 PCI-SIG 的活躍成員，持續不斷地參與研討會與規格問題。此處所提供的這些資源，將提供 PCI Express 設計簡介、讓您瞭解最新的量測技術，並說明設計與除錯方法。
PCIe 3.0 具有 8 GT/s 的位元速率，可與 PCIe 2.0 向後相容，並有效提供兩倍的 PCIe 2.0 頻寬。
不論您面對的是何種 PCIe 世代的設計挑戰，安捷倫可提供從電氣到協定的全套解決方案。 使用安捷倫產品，您可實現最佳的產品設計。
查看量測解決方案範例：PCIe 3.0 發射器測試 PCIe 3.0 接收器測試
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U4301A PCI Express® 3.0 Analyzer Module - Data Sheet
Agilent's U4301A PCI Express® 3.0 analyzer module is a protocol analyzer supporting all PCIe applications from Gen1 - Gen3 and speeds from 2.5 GT/s (Gen1) - PCI 8 GT/s (Gen3), link widths X1-X16.
產品型錄 2013-05-08 |
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N5393A PCI Express® 3.0 (Gen3) Software for Infiniium Oscilloscopes - Data Sheet
Agilent Technologies N5393C PCI Express electrical performance validation and compliance software provides you with a fast and easy way to verify and debug your PCI Express designs for add-in cards and motherboard systems. The PCI Express electrical test software allows you to automatically execute PCI Express electrical checklist tests, and it displays the results in a flexible report format. In addition to the measurement data, the report provides a margin analysis that shows how closely your device passed or failed each test.
產品型錄 2013-05-07 |
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3.13 MB
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Article series - Receiver Jitter Tolerance Testing with BERTS
Article series - Receiver Jitter Tolerance Testing with BERTS
促銷資料 2013-04-21 |
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Agilent Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test
Agilent Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test Using Agilent E5071C ENA Network Analyzer Option TDR
應用手冊 2012-10-16 |
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1.62 MB
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Crossing the Digital-Analog Divide - White Paper
This white paper helps to better understand how to cope with the physical nature of signals that we might prefer to think of as bits, nibbles and bytes, let's start with an ideal digital waveform.
應用手冊 2012-05-02 |
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6.46 MB
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PCI Express Design and Test - From Electrical to Protocol
Agilent's PCI EXPRESS® brochure will explain basic differences between Gen1, Gen2, and Gen3 as well as the full breadth of Agilent's PCIe solutions.
型錄 2012-01-17 |
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1.26 MB
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How to Pass Receiver Test According to PCI Express® 3.0 CEM Specification
This paper provides insight into the calibration method and tests, as well as the tools available. The biggest change between PCIe 2.x and rev. 3.0 is that RX test on cards will now be normative.
應用手冊 2011-11-30 |
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3.22 MB
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PCI Express Transmitter Electrical Validation and Compliance Testing - Application Note
This application note is intended for digital designers and developers validating electrical
performance of PCI Express-based designs and working toward electrical compliance of PCI Express products.
應用手冊 2011-10-28 |
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1.01 MB
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Advanced Techniques for PCIe 3.0 Receiver Testing-Paper
Advanced Techniques for PCIe 3.0 Receiver Testing-Paper
應用手冊 2011-09-01 |
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2.20 MB
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Accurate Calibration of Receiver Stress Test Signals for PCI Express® Rev. 3.0
This paper describes the calibration of the receiver-stress signal according to the base specification of PCIe3. The calibration of the RX test signal is different from PCIe 2.0.
應用手冊 2011-06-22 |
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4.82 MB
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Agilent Technologies' Introduces Complete Test Solution for PCI Express® 3.0
新聞資料 2010-02-01 |
DOC
67 KB
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下載新的 PCI Express® Rev. 2 J-BERT 應用手冊
下載新的 PCI Express® Rev. 2 J-BERT 應用手冊
型錄 2009-07-24 |
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Agilent Technologies Introduces Industry-First Half-Size Mid-Bus Probing Solution for PCI Express®
新聞資料 2009-06-04 |
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Strategies for Debugging Serial Bus Systems with Infiniium Oscilloscopes
This application note discusses the challenges associated with and new solutions for debugging serial bus designs including PCI-Express Generation 1, Inter Integrated Circuit (I2C), Serial Peripheral Interface (SPI), or Universal Serial Bus (USB)
應用手冊 2009-06-01 |
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執行PCI Express Revision 2接收器(RX)抖動容忍度測試
執行PCI Express Revision 2接收器(RX)抖動容忍度測試
應用手冊 2009-05-18 |
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Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.
應用手冊 2009-03-24 |
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606 KB
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Agilent Technologies to Demonstrate Industry-First PCI Express(r) Jammer, Jitter Tolerance Test for
新聞資料 2009-02-02 |
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PCI Express® Revision 2 - Receiver Testing With J-BERT N4903A and 81150A Pulse
應用手冊 2008-12-03 |
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1000 KB
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Upgrade to PCI Express 2.0© Receiver Test
The 15431A is a filter set for the 81150A. It generates the random jitter profile for testing PCI Express 2.0 receivers, to be used in conjunction with the N4903A. This fact sheet explains the upgrade.
應用手冊 2008-10-24 |
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348 KB
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Benefits of using PCI Express 2.0.
An overview of the main features and benefits of using PCI Express 2.0
應用手冊 2008-10-17 |
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764 KB
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Agilent Technologies' E2960B Series for PCI Express(r) Protocol Test Now Includes Module for Active
新聞資料 2008-08-19 |
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適用於 PCI Express 2.0 的 Agilent E2960B 系列
產品型錄 2008-08-14 |
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Jitter Solutions for Telecom, Enterprise, and Digital Designs
Complete solutions for characterization and test of jitter in high-speed digital transmission systems, high-speed I/O connections, and buses.
型錄 2008-06-25 |
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3.49 MB
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Agilent Technologies' Infiniium 90000A Series 13-GHz Oscilloscope Approved by PCI-SIG(r) for PCI Exp
新聞資料 2008-05-05 |
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Precision Waveform Analysis for High-Speed Digital Communications Technical Overview
his document will discuss the Agilent 86108A precision waveform analyzer plug-in module with the Agilent 86100C DCA-J sampling oscilloscope mainframe for accurate analysis of high-speed digital communications signals.
應用手冊 2008-04-17 |
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