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Phase-Locked Loops (PLL)

Design, synthesize, and simulate phase-locked loops (PLL) and frequency synthesizers with a comprehensive array of design and simulation tools. Make sure that critical performance goals can be achieved and reliably manufactured. Critical characteristics such as settling time and phase noise can be investigated and optimized for superior performance using Agilent's EDA software products such Advanced Design System (ADS), GoldenGate RFIC Simulator and/or Genesys.

After your design is complete, Agilent's test and measurement equipment, such as Signal Source Analyzer, Oscilloscopes and Spectrum Analyzers, can help you measure and verify your prototype and products.

The E5052B SSA Signal Source Analyzer provides fast and accurate measurements for PLL/VCO design and manufacturing, and contributes to producing high-quality profitable products with a shorter lead time. Phase noise, AM noise, Lockup time, VCO tuning performance, Harmonics, DC supply noise, you can evaluate all with this one box solution. 

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Eventi di Agilent Italia 
Benvenuti nella pagina degli eventi di Agilent Italia

Seminar

 
A Practical Approach to Verifying RFICs with Fast Mismatch Analysis 
Originally broadcast October 28, 2010

Webcast - recorded

 
New impedance measurement solutions & apps using 5 Hz to 3 GHz VNA  
Originally broadcast April 19, 2011

Webcast - recorded

 
Test & Measurement events in Europe, Middle East & Africa 
Test & Measurement events in Europe, the Middle East, and Africa - seminars, trade shows, user group meetings, webcasts, tutorials and conferences.

Seminar

 
The Right Scope Probes Deliver Results 
Originally broadcast Feb. 22, 2011

Webcast - recorded