鎖相迴路
安捷倫提供完整的設計及模擬工具，讓您能夠輕鬆設計、合成和模擬鎖相迴路及頻率合成器，確保您可以達成重要效能目標並製造可靠的元件。利用安捷倫的電子設計自動化軟體，例如 ADS、GoldenGate RFIC模擬器或 Genesys，您可偵測安定時間和相位雜訊等重要特性，並將其最佳化，以獲致優異效能。
完成設計後，則可利用安捷倫的信號源分析儀、示波器及頻譜分析儀等量測儀器，快速量測並驗證您的設計原形與產品。
Agilent E5052B SSA信號源分析儀可針對PLL/VCO設計與製造，執行快速而準確的量測，並可在更短時間內，將高品質、高獲利產品推出上市。無論您是需要量測相位雜訊、調幅雜訊、鎖定時間、VCO調諧效能、諧波雜訊或是直流雜訊，安捷倫EDA軟體讓您一次搞定所有問題。
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探索高效能即時示波器的未來趨勢
現場直播：2012 年 4 月 11 日； 10am （美西時間） / 1pm （美東時間）
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100G TX Designs - Tips & Techniques for Accurate Characterization Webcast
Original broadcast on February 27, 2013
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A Practical Approach to Verifying RFICs with Fast Mismatch Analysis
Originally broadcast October 28, 2010
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Advanced Design System 2009U1 Fundamentals
This medium-paced, 3-day course provides detailed introduction to the application of Advanced Design System for communication systems and circuit designs. Click on link to view full course description and class dates and locations.
教室教育訓練 |
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Agilent EEsof EDA Customer Education and Services
Brief overview of Agilent EEsof EDA Customer Education and Services.
訓練教材 2010-08-11 |
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Application-focused Oscilloscope Measurements – Education Webcast Series
Live broadcasts throughout 2013
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Characterizing phase-locked-loop signal transition behaviors such as microphonic/phase-hits
研討會講義 2008-10-10 |
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1.26 MB
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Ethernet Compliance Testing: Become More Green and Energy Efficient Webcast
Original broadcast March 20, 2013
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Genesys Webcasts - "How-To-Design" series
Originally broadcast in 2009. Access the 6 WebEX recordings
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Making Early Design Tradeoffs using Advanced Measurement Based Behavioral Models
This Presentation (Connecting Design and Test Seminar, paper #2) decribes early design tradeoffs using advanced measurement based behavioral models in detail.
研討會講義 2003-05-29 |
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2.22 MB
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Making Your Most Accurate DDR4 Compliance Measurements Webcast
Originally broadcast January 23, 2013
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New impedance measurement solutions & apps using 5 Hz to 3 GHz VNA
Originally broadcast April 19, 2011
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Noise in Mixers, Oscillators, Samplers & Logic - Intro to Cyclostationary Noise
A detailed Presentation on Cyclostationary Noise presented by Ken Kundert at CICC 2000; covers Noise in Mixers, Oscillators, Samplers and Logic in detail.
研討會講義 2007-07-01 |
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1.02 MB
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Nonlinear Characterization and Modeling Through Pulsed IV/S-Parameters
Original broadcast Mar 27, 2012
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Oscilloscope Techniques for Precisely Measuring Small Signals Webcast
Original broadcast February 13, 2013
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PCI Express 3.0 Compliance - Successfully Navigating the Standard Webcast
Original broadcast May 7, 2013
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PCI Express(R) 3.0 Strategies for Transmitter and Receiver Validation
Originally broadcast Feb 10, 2011
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Physical Layer Test Challenges and Solutions for MIPI Interfaces Webcast
Original broadcast January 30, 2013
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Practical Guide to Making Advanced Jitter Measurements
Original broadcast September 19, 2012
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Presentation on 1.6-mW LC-tuned VCO Design for 2.4GHz in 0.18-um RF CMOS Technology
This Presentation presents the specification, design layout and measurements of a 2.5-GHz low-power LC-tuned oscillator designed in a 0.18um CMOS technology.
研討會講義 2002-03-01 |
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1.25 MB
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Presentation on 2.4-GHz CMOS RF Transceiver for IEEE 802.11b Wireless LAN
A Technical Presentation by Wen-Shen Wuen (TWT) on 2.4-GHz CMOS RF Transceiver for IEEE 802.11b Wireless LAN.
研討會講義 2002-01-28 |
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536 KB
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Presentation on 3GPP RF System Simulation
This Presentation presents concept and introduction to 3G W-CDMA Design with the Advanced Design System (ADS) and Simulation Technologies.
研討會講義 2001-09-01 |
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2.97 MB
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Presentation on Accurate Design of Low-Noise High-Frequency SAW Oscillators
This Presentation presents design steps which include the necessary measurements and modeling methods and the used simulation technologies in the Advanced Design System (ADS) to achieve the goal.
研討會講義 2001-09-01 |
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2.71 MB
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Presentation on ADS for Wireline and High Speed Analog Design
A detailed Presentation (presented on 21 May 2002) on using Advanced Design System for Wireline and High Speed Analog Design.
研討會講義 2002-05-21 |
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4.75 MB
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Presentation on ADS Simulation Power for 40-GBit Optical Wireline
A detailed Presentation on ADS Simulation Power for 40-GBit Optical Wireline by Edmond Zauner, Agilent EEsof EDA, 12 June 2001.
研討會講義 2001-06-12 |
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2.10 MB
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