Phase-Locked Loops (PLL)
Design, synthesize, and simulate phase-locked loops (PLL) and frequency synthesizers with a comprehensive array of design and simulation tools. Make sure that critical performance goals can be achieved and reliably manufactured. Critical characteristics such as settling time and phase noise can be investigated and optimized for superior performance using Agilent's EDA software products such Advanced Design System (ADS), GoldenGate RFIC Simulator and/or Genesys.
After your design is complete, Agilent's test and measurement equipment, such as Signal Source Analyzer, Oscilloscopes and Spectrum Analyzers, can help you measure and verify your prototype and products.
The E5052B SSA Signal Source Analyzer provides fast and accurate measurements for PLL/VCO design and manufacturing, and contributes to producing high-quality profitable products with a shorter lead time. Phase noise, AM noise, Lockup time, VCO tuning performance, Harmonics, DC supply noise, you can evaluate all with this one box solution.
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Characterizing phase-locked-loop signal transition behaviors such as microphonic/phase-hits
Seminar Materials 2008-10-10 |
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1.26 MB
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Making Early Design Tradeoffs using Advanced Measurement Based Behavioral Models
This Presentation (Connecting Design and Test Seminar, paper #2) decribes early design tradeoffs using advanced measurement based behavioral models in detail.
Seminar Materials 2003-05-29 |
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2.22 MB
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Noise in Mixers, Oscillators, Samplers & Logic - Intro to Cyclostationary Noise
A detailed Presentation on Cyclostationary Noise presented by Ken Kundert at CICC 2000; covers Noise in Mixers, Oscillators, Samplers and Logic in detail.
Seminar Materials 2007-07-01 |
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1.02 MB
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Presentation on 1.6-mW LC-tuned VCO Design for 2.4GHz in 0.18-um RF CMOS Technology
This Presentation presents the specification, design layout and measurements of a 2.5-GHz low-power LC-tuned oscillator designed in a 0.18um CMOS technology.
Seminar Materials 2002-03-01 |
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1.25 MB
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Presentation on 2.4-GHz CMOS RF Transceiver for IEEE 802.11b Wireless LAN
A Technical Presentation by Wen-Shen Wuen (TWT) on 2.4-GHz CMOS RF Transceiver for IEEE 802.11b Wireless LAN.
Seminar Materials 2002-01-28 |
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536 KB
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Presentation on 3GPP RF System Simulation
This Presentation presents concept and introduction to 3G W-CDMA Design with the Advanced Design System (ADS) and Simulation Technologies.
Seminar Materials 2001-09-01 |
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2.97 MB
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Presentation on Accurate Design of Low-Noise High-Frequency SAW Oscillators
This Presentation presents design steps which include the necessary measurements and modeling methods and the used simulation technologies in the Advanced Design System (ADS) to achieve the goal.
Seminar Materials 2001-09-01 |
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2.71 MB
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Presentation on ADS for Wireline and High Speed Analog Design
A detailed Presentation (presented on 21 May 2002) on using Advanced Design System for Wireline and High Speed Analog Design.
Seminar Materials 2002-05-21 |
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4.75 MB
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Presentation on ADS Simulation Power for 40-GBit Optical Wireline
A detailed Presentation on ADS Simulation Power for 40-GBit Optical Wireline by Edmond Zauner, Agilent EEsof EDA, 12 June 2001.
Seminar Materials 2001-06-12 |
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2.10 MB
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Presentation on Amplifier Design and Performance Testing
This Presentation presents a design flow to create the circuit design for the Power Amplifier with the assistance of the two DesignGuides (Passive Circuit and Power Amplifier), which are new in ADS 1.3.
Seminar Materials 2000-11-01 |
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3.75 MB
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Presentation on Amplifier Design in ADS for Radar Applications
A Technical Presentation on amplifier design in ADS for radar applications was presented in Aerospace and Defense Symposium 2005.
Seminar Materials 2005-08-01 |
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5.61 MB
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Presentation on High Efficiency RF Power Amplifiers using Bandpass DSM
This Presentation by Shawn P. Stapleton presents the application of bandpass Delta-Sigma Modulators (DSM) to Switching Mode Power Amplifiers (SMPA) for cellular applications.
Seminar Materials 2001-06-12 |
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1010 KB
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Presentation on High Yield MMIC Front-To-Back Design with ADS 2008
This Presentation by J Sifri discusses how to take advantage of the latest productivity enhancements in ADS 2008 to implement a robust methodology for high yield MMIC designs.
Seminar Materials 2008-02-19 |
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4.28 MB
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Presentation on Hybrid Time/Frequency Simulation Techniques
A detailed Presentation (presented on 17 May 2002) describing Hybrid Time/Frequency Simulation Techniques.
Seminar Materials 2002-05-17 |
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2.93 MB
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Presentation on Recent Advancements in RFIC Simulation Technology
This Presentation details the needs of RF IC designers; faster-robust simulations, simulations of larger circuits, new simulation algorithms, behavioral model extraction for system-level verification.
Seminar Materials 2002-03-01 |
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1.34 MB
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Presentation on Regenerative Payload Downconverter Simulation
This Presentation describes Regenerative Payload Downconverter Simulation in detail.
Seminar Materials 2002-05-01 |
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1.04 MB
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Presentation on RF Circuits Integration using CMOS SOI 0.25μm Technology
This Presentation presents a brief overview of the Silicon On Insulator (SOI) technology and also introduces two RF designs performed successfully with 0.25μm SOI technology.
Seminar Materials 2002-03-01 |
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1.22 MB
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Presentation on RF System-in-Package Design in ADS
This Presentation by HeeSoo LEE (Agilent EEsof) presents an overview of RF System-in-Package (SiP) technology and also demonstrates ADS simulation capabilities for RF module applications.
Seminar Materials 2004-03-12 |
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5.65 MB
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Presentation on Satellite Tuner Single Chip Simulation with ADS
This Presentation describes STV0399 satellite tuner and use of ADS to simulate a whole front-end RF of a satellite receiver for digital TV.
Seminar Materials 2002-03-01 |
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2.65 MB
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Presentation on Simulating Phase Locked Loops using ADS
This Presentation details PLL simulation using ADS, Envelope simulation, PLL component behavioral modeling, Phase noise, Spurs, Fractional N-simulation and Divide ratio using sigma delta modulator.
Seminar Materials 2010-08-19 |
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1 MB
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Speed of the Top-down design Methodology combined with the Silicon Accuracy
A Joint presentation on Cadence and Agilent's RF/MS Design Solutions to help reduce risk, development time and costs, by providing accurate RFIC bottom-up verification.
Seminar Materials 2004-04-01 |
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1.58 MB
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SSA presentation material – customer viewable slides with speaker notes
Seminar Materials 2008-10-10 |
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1.01 MB
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