Design and Simulation of High-Speed Digital
Agilent tools provide views into the time and frequency domains, revealing the underlying problems and ensuring compliant designs. With Agilent, you'll achieve your best design.
High Speed Digital Design Challenges
- Analyzing complete chip-to-chip links by co-simulating individual components, each at its most appropriate level of abstraction: channel-, circuit- or physical-level
- Importing backplane S-parameter models accurately into circuit and channel simulations, avoiding causality and passivity issues
- Correlating measured and simulated data before using simulation to interpolate between measurement planes and extrapolating to virtual prototypes
What's New
- ClioSoft Announces the Integration of SOS Design Data Management with Advanced Design System
- Agilent Technologies and SiSoft Introduce Pre-Standard IBIS-AMI Modeling Guide
- Agilent Technologies to Demonstrate Newest High-Speed Digital Design and Test Solutions at DesignCon
- Electrical Redriver Modeling Solution to Solve Key Challenges in Designing Chip-to-Chip Links
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IMS 2011 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
2011 show, last June, 2011; Baltimore Convention Center
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IMS 2012 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
June 17-22, 2012 in Montréal, Canada
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IMS 2013 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
June 2 - 7, 2013 in Seattle, WA
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