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Design and Simulation of High-Speed Digital

Agilent tools provide views into the time and frequency domains, revealing the underlying problems and ensuring compliant designs. With Agilent, you'll achieve your best design.

High Speed Digital Design Challenges

  • Analyzing complete chip-to-chip links by co-simulating individual components, each at its most appropriate level of abstraction: channel-, circuit- or physical-level
  • Importing backplane S-parameter models accurately into circuit and channel simulations, avoiding causality and passivity issues
  • Correlating measured and simulated data before using simulation to interpolate between measurement planes and extrapolating to virtual prototypes

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Agilent EEsof EDA Newsletter - Product and Application News 
Keep tabs on the latest product and application news and review the archives of the Agilent EEsof EDA Newsletter.

뉴스레터 2013-05-14

 
Momentum Overview 
Overview video of Agilent Momentum, the gold standard in 3D planar electromagnetic simulation that enables your design of optimum laminar structures.

기본 데모 2013-05-08

 
ClioSoft Announces the Integration of SOS Design Data Management with Advanced Design System 
ClioSoft's integrated solution offers ADS users seamlessly integrated revision control and enterprise design data management

보도자료 2013-05-07

 
High Speed Digital Design and Simulation Videos on YouTube 
Agilent EEsof EDA's High Speed Digital Design and Simulation video playlist on YouTube.

기본 데모 2013-04-19

 
EDA Support Services 
Agilent Support Services for EDA Products offers customers several benefits otherwise not available. This service is designed to help you get the most out of your software purchases.

브로셔 2013-04-09

PDF PDF 128 KB
Agilent Technologies Launches Recognition Program for EDA Experts 
Agilent launches its Agilent Certified Expert recognition program for EDA experts. Eligible participants include individuals demonstrating a high level of expertise-both theoretical and practical-in applying Agilent EEsof EDA tools for product design and modeling.

보도자료 2013-03-12

 
Agilent Technologies Commits $90 Million Gift of Software to Georgia Institute of Technology 
Agilent announces the largest in-kind software donation ever in its longstanding relationship with the Georgia Institute of Technology.

보도자료 2013-02-04

 
Agilent Technologies and SiSoft Introduce Pre-Standard IBIS-AMI Modeling Guide 
Agilent and Signal Integrity Software, Inc. (SiSoft) announce guidelines that enable system designers to use advanced jitter and broadband analog capabilities when modeling high-speed serial devices.

보도자료 2013-01-29

 
DDR4 TdiVW/VdiVW Bit Error Rate Measurement or Understanding Bit Error Rate 
Importance of making BER measurement calculations to form a statistical measurement of total jitter to understand the design's data valid window result and design error rates.

어플리케이션 노트 2013-01-24

PDF PDF 1.65 MB
Agilent Technologies to Demonstrate Newest High-Speed Digital Design and Test Solutions at DesignCon 
Agilent announces it will demonstrate its high-speed digital design and test solutions at DesignCon, Jan. 28- 31, at the Santa Clara Convention Center (Booth 201).

보도자료 2013-01-15

 
Electrical Redriver Modeling Solution to Solve Key Challenges in Designing Chip-to-Chip Links 
Agilent introduces a redriver modeling solution designed to quickly and accurately solve the challenge posed by signal distortion in multigigabit-per-second systems.

보도자료 2012-11-05

 
High Speed Digital Design with Advanced Design System 
This brochure describes 3 ADS suites of applicable simulators, libraries, and capabilities for signal integrity engineers.

브로셔 2012-11-02

PDF PDF 1.65 MB
Frequency Domain Analysis of Jitter Amplification in Clock Channels 
Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained.

어플리케이션 노트 2012-11-01

PDF PDF 257 KB
ADS W2302EP/ET, W2500EP/ET, and W2312EP/ET Transient Convolution Products 
Advanced Design System W2302EP/ET Transient Convolution Element, W2500EP/ETTransient Convolution GT Option, and W2312EP/ET Transient Convolution Distributed Computing 8-pack

브로셔 2012-10-30

PDF PDF 1.31 MB
Agilent Technologies to Demonstrate High-Speed Digital Design Solutions at EPEPS 
Agilent announces it will demonstrate its high-speed digital design solutions at EPEPS 2012, Oct. 22-23, at the Tempe Mission Palms Hotel, in Tempe, Ariz.

보도자료 2012-10-22

 
Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow 
Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow.

어플리케이션 노트 2012-09-21

STATS ChipPAC Launches QFN Package Design Kit for Agilent Technologies’ Advanced Design System 
STATS ChipPAC announces the launch of its Quad Flat No-Lead (QFN) package design kit for ADS.

보도자료 2012-09-12

 
The Power of S-Parameters for High Speed Digital Design Tutorial 
Learn to use S-parameters for high-speed digital designs with this video tutorial.

판촉 자료 2012-09-07

 
Agilent to Demonstrate Test Solutions at International Symposium on Electromagnetic Compatibility 
Agilent will demonstrate its test solutions at the IEEE International Symposium on Electromagnetic Compatibility in Pittsburg, Aug. 5-10, 2012.

보도자료 2012-07-18

 
W1714 SystemVue AMI Modeling Kit / W1713 SystemVue SerDes Model Library 
This datasheet provides an overview of the W1714 SystemVue AMI Modeling Kit, which consists of SerDes libraries for SystemVue plus automatic IBIS AMI model generation.

데이터시트 2012-05-21

PDF PDF 672 KB
Agilent Technologies’ Advanced Design System Selected by ADATA to Speed Product Development 
ADATA Technology Co., a provider of complete memory solutions in Taipei, Taiwan, has selected ADS software for developing memory modules for the high-speed digital market.

보도자료 2012-05-15

 
Which Electromagnetic Simulator Should I Use? 
This paper outlines three of the key EM simulation technologies, MoM, FEM, FDTD and attempt to compare and contrast the relative merits of each.

어플리케이션 노트 2012-04-06

PDF PDF 3.21 MB
Simulating FPGA Power Integrity Using S-Parameter Models 
This application note describes how self-impedance (frequency) can easily be determined by simulating the frequency domain self-impedance profile of a Power Distribution Network (PDN).

어플리케이션 노트 2012-04-02

S-파라미터 시리즈: 가상 프로빙에 디임베딩 툴 사용 어플리케이션 노트(영문) 
까다로운 측정 포인트에 대한 가상 액세스를 위해 디임베딩 툴을 사용하는 방법에 대해 설명합니다.

어플리케이션 노트 2012-03-11

Agilent EEsof High Speed Digital Design Flow 
This video shows the high speed digital design flow from Agilent that helps you cut through the challenges of today's multi-gigabit standards.

기본 데모 2012-01-31

 

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