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고속 디지털 분석

강력한 분석 툴로 세부적 특성 분석 수행

 

대부분의 시리얼 데이터 링크는 표준 준수 상호 운용성을 위해 설계된 고속 IC로 시작하고 끝납니다. 비트 속도가 증가함에 따라 지터, 간섭 및 기타 불완전 요소에 대한 여유 폭 때문에 10-12 미만의 BER을 얻기가 점차 어려워지고 있습니다. 다음 툴은 설계를 세부적으로 특성 분석하는 도움을 줍니다. 애질런트 - 최고의 설계에 도달할 수 있습니다.

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정렬방식:
DDR4 TdiVW/VdiVW Bit Error Rate Measurement or Understanding Bit Error Rate 
Importance of making BER measurement calculations to form a statistical measurement of total jitter to understand the design's data valid window result and design error rates.

어플리케이션 노트 2013-01-24

PDF PDF 1.65 MB
Effective Reflection Characterization for Active Devices Using ENA Option TDR Application Note 
This application note describes Hot TDR measurement, which is an effective characterization method for the reflection of transmitter and receiver.

어플리케이션 노트 2012-01-12

PDF PDF 416 KB
언어 
N4916B De-emphasis Signal Converter Data Sheet 
The N4916B de-emphasis signal converter enables R&D and test engineers to accurately characterize gigabit serial ports and channels. The clock doubler option is needed to analyze half-rate clock devices.

데이터시트 2011-04-13

PDF PDF 3.07 MB
Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P 
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.

어플리케이션 노트 2009-03-24

PDF PDF 606 KB
Characterizing Clock Jitter through Phase Noise Measurements Speeds up Design Verification Process 
This white paper discusses a new measurement method for obtaining highly accurate low random jitter (RJ) measurements and performing real-time analysis of RJ and periodic jitter (PJ) of components.

어플리케이션 노트 2008-11-20

PDF PDF 688 KB
언어 
Measuring Jitter in Digital Systems (AN 1448-1) 
Measuring jitter and how to calculate total jitter.

어플리케이션 노트 2008-01-30

PDF PDF 1.91 MB
Complete solutions for characterization, debug, compliance test of HDMI designs 
This brochure discusses test solutions for HDMI. Thorough characterization and validation of HDMI-based designs

브로셔 2007-10-19

PDF PDF 1.12 MB
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY) 
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)

어플리케이션 노트 2007-07-30

PDF PDF 611 KB
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices 
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices

어플리케이션 노트 2007-06-19

PDF PDF 214 KB
애질런트 86100C DCA-J(PN 86100C-1)를 사용한 고정밀 지터 분석 

어플리케이션 노트 2007-03-07

PDF PDF 1.64 MB
언어 
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A 
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Software Platform: 8 pages

어플리케이션 노트 2007-01-31

PDF PDF 272 KB
Simulation of Jittering Synchronization Signals for Video Interfaces (PN 4) 
This Product Note shows how Research and Development engineers use pulse generators of the Agilent 81100 Family for the development of interfaces ...

어플리케이션 노트 2006-12-12

PDF PDF 382 KB
Using Clock Jitter Analysis to Reduce BER in Serial Data Applications 
This Application Note emphasizes on the emerging techniques for reference clock jitter analysis from the perspective of oscillator physics, phase noise theory, and serial data technology.

어플리케이션 노트 2006-12-01

PDF PDF 1.15 MB
언어 
HDMI Sink and Source Compliance Test and Characterization 
In this product note examples are given for advanced, automated HDMI compliance tests and characterization based on a high bandwidth oscilloscope, a TMDS Signal Generator and the Test Automation Software Platform.

어플리케이션 노트 2006-10-27

PDF PDF 431 KB
언어 
Automated PCI Express Receiver Compliance Test and Characterization with N5990A 
This product note shows how to use the test automation software platform to verify and debug your PCI Express bus designs. As an example, a multi-lane add-in card is used.

어플리케이션 노트 2006-08-29

PDF PDF 444 KB
Calibrated Jitter, Jitter Tolerance Test and Jitter Laboratory with the Agilent J-BERT N4903A 
This application note describes the N4903A BERT characterization solution for emerging serial gigabit devices: it helps engineers make quick and accurate jitter tolerance tests, which have been complicated and hard to do in the past.

어플리케이션 노트 2006-07-18

PDF PDF 5.33 MB
Mastering Jitter in Serial Gigabit Designs 
Mastering Jitter in Serial Gigabit Designs

판촉 자료 2006-06-22

PDF PDF 1.01 MB
Comparison of Different Jitter Analysis Techniques With a Precision Transmitter 
This white paper describes how various jitter analysis techniques give dissimilar results. Which is right? We built a precision jitter transmitter to compare results of different techniques where test sets were exposed to known levels of jitter.

어플리케이션 노트 2006-04-06

PDF PDF 164 KB
Advanced Memory Buffer (AMB), Characterization of Timing and Voltage Specification 
Advanced Memory Buffer (AMB), Characterization of Timing and Voltage Specification

어플리케이션 노트 2005-09-22

PDF PDF 812 KB
Eye Characterization on Idle and Framed Data Traffic: the Bit Recovery Mode 
Traditionally, bit error rate testing compares the bits from a Device Under Test (DUT) against a reference data set, called the expected data. The user of Bit Error Ratio Tester (BERT) has to provide this expected data and load it into the tester.

어플리케이션 노트 2005-09-21

PDF PDF 356 KB
Improved Method for Characterizing and Modeling Gigabit Flex-Circuit Based Interconnects 
This paper describes sophisticated, time-domain methods of accurately predicting time- and frequency-domain high-speed signal characteristics.

어플리케이션 노트 2005-09-08

PDF PDF 11.72 MB
Fast Total Jitter Test Solution 
This application note compares different total jitter measurement and extrapolation techniques to the Fast Total Jitter Measurement

어플리케이션 노트 2005-08-29

PDF PDF 1.28 MB
텔레콤, 기업 및 디지털 설계를 위한 지터 솔루션  
고속 디지털 전송 시스템, 고속 I/O 연결 및 버스에서 지터의 특성분석 및 테스트를 위한 완전한 솔루션입니다.

브로셔 2005-08-26

PDF PDF 1.38 MB
Total Jitter Measurements at Low Probability Levels, Using Optimized BERT Scan Method 
This paper describes an optimized technique based on probabliity and statistics theory that enables accurate TJ measurements at the 1e-12 bit error ratio level in about 20 minutes at 10 Gbit/s.

어플리케이션 노트 2005-07-11

PDF PDF 894 KB
Total Jitter Measurement at Low Probability Levels 
White paper produced for DesignCon 2005 regarding Total Jitter Measurement at Low Probability Levels, Using Optimized BERT Scan Method.

어플리케이션 노트 2005-07-11

PDF PDF 222 KB

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