Phase-Locked Loops (PLL)

PLL design, synthesis, optimization and test

어플리케이션 노트

언어:한국어 | English | 모두

상세 분류

  • 상세 카테고리 없음

1 / 1

정렬방식:

검색결과

제목/설명 날짜 타입
PDF PDF 1.22 MB Design and Measurement of a 400 MHz Frequency Synthesizer: Accuracy Proof
This Application Note explains the 400 MHz PLL design with examples and hence giving the engineer a powerful effective tool for designing real PLLs.
2001-11-01 어플리케이션 노트

1 / 1