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Digital Design & Interconnect Standards

Achieve your best design with Agilent. Investigate specific solutions for high speed standards plus solutions for your high-speed digital design cycle (design, simulation, analysis, debug compliance and signal integrity) challenges.

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Direct Rambus™ Architecture and Measurements 
Includes and overview of Direct Rambus™ channel electrical and logical architecture and Direct RDRAM device physical architecture. Presents measurement examples.

Application Note 2001-07-18

 
Effective Reflection Characterization for Active Devices Using ENA Option TDR Application Note 
This application note describes Hot TDR measurement, which is an effective characterization method for the reflection of transmitter and receiver.

Application Note 2012-01-12

PDF PDF 416 KB
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Ensuring Compliance and Interoperability of DDR Designs 
The Joint Electronic Devices Engineering Council (JEDEC) specification requires a large number of test parameters to be verified for DDR compliance – a time-consuming exercise if you make the measurements manually.

Application Note 2008-12-19

PDF PDF 379 KB
Evaluating Microstrip with Time Domain Reflectometry (AN 1304-1) 
This application note discusses microstrip transmission line techniques that were evaluated using TDR measurements.

Application Note 2000-11-01

PDF PDF 349 KB
Languages 
Evaluating Oscilloscope Sample Rates vs. Sampling Fidelity 
Evaluating Oscilloscope Sample Rates vs. Sampling Fidelity: How to Make the Most Accurate Digital Measurements When you select an oscilloscope for accurate, high-speed digital measurements, sampling fidelity can often be more important than maximum sample rate.

Application Note 2012-11-11

PDF PDF 1.56 MB
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Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow 
Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow.

Application Note 2012-09-21

PDF PDF 467 KB
Languages 
Eye Characterization on Idle and Framed Data Traffic: the Bit Recovery Mode 
Traditionally, bit error rate testing compares the bits from a Device Under Test (DUT) against a reference data set, called the expected data. The user of Bit Error Ratio Tester (BERT) has to provide this expected data and load it into the tester.

Application Note 2005-09-21

PDF PDF 356 KB
Fast Total Jitter Test Solution 
This application note compares different total jitter measurement and extrapolation techniques to the Fast Total Jitter Measurement

Application Note 2005-08-29

PDF PDF 1.28 MB
Faster Risetime for TDR Measurements (PN 86100-4) 
This product note demonstrates how to make time domain reflection (TDR) measurements on electrical networks with better than 40 ps resolution.

Application Note 2001-07-01

PDF PDF 943 KB
Find and identify the causes of data corruption and elusive failures 
The Protocol-decode software allows you to track and fix infrequent glitches and other signal anomalies that might otherwise be difficult to find.

Application Note 2008-12-19

PDF PDF 360 KB
Finding Hidden Problems Using Aglent's Deep-Memory Oscilloscope: How IBM Solved a Mystery 
AN IBM CUSTOMER SUCCESS STORY As far as you can see everything is working properly - the right signals are getting to the right places at the right time, the firmware is doing what it is supposed to do and everything else is in order - and yet the system still doesn't function properly.

Application Note 2002-04-03

PDF PDF 1.34 MB
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Finding Sources of Jitter with Real-Time Jitter Analysis (AN 1448-2) 
This application note describes how to use a real-time oscilloscope with jitter analysis, along with the stimulus-response techniques, to meet the critical time-correlation requirement to relate jitter trend measurement results to measured signals.

Application Note 2003-06-30

PDF PDF 1.70 MB
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Flat Panel Display Link Test 
This Product Note shows how to verify the Bit Error Rate (BER) of 1-serial to 7-parallel Rx chip with the Agilent 81250 Parallel Bit Error Ratio Tester (ParBERT).

Application Note 2004-07-29

PDF PDF 128 KB
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Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P 
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.

Application Note 2009-03-24

PDF PDF 606 KB
Frequency Domain Analysis of Jitter Amplification in Clock Channels 
Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained.

Application Note 2012-11-01

PDF PDF 257 KB
Functional Test & Data Acquisition I/O Benchmarks 
The following benchmarks compare computer I/O performance in functional test and data acquisition applications.

Application Note 2001-12-04

 
Generating/Measuring Jitter with the 81134A Pulse/Pattern Generator & 54855A Infiniium Scope 
Describes how to generate and measure jitter with the 81133/34A and 54855A

Application Note 2003-06-30

PDF PDF 483 KB
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HDMI Sink and Source Compliance Test and Characterization 
In this product note examples are given for advanced, automated HDMI compliance tests and characterization based on a high bandwidth oscilloscope, a TMDS Signal Generator and the Test Automation Software Platform.

Application Note 2006-10-27

PDF PDF 431 KB
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High Precision Time Domain Reflectometry (AN 1304-7) 
Techniques for achieving the highest possible accuracy and resolution in signal integrity impedance measurements

Application Note 2003-10-27

PDF PDF 3.72 MB
Languages 
High-Precision TDR with the Agilent 86100 DCA & Picosecond Pulse Labs 4020 Source Enhancement Module 
Learn how to build a high-precision time-domain reflectometry/time-domain transmission measurement system.

Application Note 2003-09-12

PDF PDF 288 KB
High-Speed Source Synchronous Interface Design 
presents considerations for high-speed interface design using examples from a DDRSDRAM implementation.

Application Note 2001-08-02

 
Histograms Simplify Analysis of Random Jitter (AN 1200-9) 
The Agilent 53310A's fast histograms make it easy to get complete view of clock jitter. The shape of the histogram indicates the nature of the jitter. For example a Gaussian-shaped distribution would suggest the jitter is random. Statistics are calculated automatically to provide the mean...

Application Note 2000-08-01

PDF PDF 114 KB
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How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY) 
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)

Application Note 2007-07-30

PDF PDF 611 KB
How to Pass Receiver Test According to PCI Express® 3.0 CEM Specification 
This paper provides insight into the calibration method and tests, as well as the tools available. The biggest change between PCIe 2.x and rev. 3.0 is that RX test on cards will now be normative.

Application Note 2011-11-30

PDF PDF 3.22 MB
Languages 
How to use the Agilent 81200 together with Agilent VEE 
This attached Product Note shows how to use the Agilent 81200 Data Generator/Analyzer together with Agilent VEE for Signal Integrity Analysis.

Application Note 2002-01-28

PDF PDF 383 KB

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