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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Agilent - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more 
 

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Minimizing Crosstalk in Hi-Speed Interconnects using Measurement-based Modeling 
This Presentation presented by Mike Resso (Agilent Technologies) focuses on minimizing crosstalk in high speed interconnects using measurement-based modeling.

Seminar Materials 2006-09-01

PDF PDF 1.50 MB
MIPI Physical Layer Transmitter Test Solutions Webcast 
Original broadcast April 2, 2014

Webcast - recorded

 
Modeling Optical Fiber Communication with Channel Simulation Webcast 
Original broadcast March 6, 2013

Webcast - recorded

 
Navigating Compliance Standards Panel Discussion 
Original broadcast July 17, 2013

Webcast - recorded

 
Network Analysis Back to Basics Webcast 
Recorded broadcast August 21, 2013

Webcast

 
Network Analysis Basics for High Speed Digital Engineers Webcast 
Original broadcast July 30, 2013

Webcast - recorded

 
New impedance measurement solutions & apps using 5 Hz to 3 GHz VNA  
Originally broadcast April 19, 2011

Webcast - recorded

 
Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

Webcast - recorded

 
Optimizing High-Speed Digital Channels Using State-of-the-art Signal Integrity Tools Seminar 
Various dates and location in 2014

Seminar

 
Optimizing PXI Modular Functional Test System Throughput Webcast 
Originally broadcast April 27, 2011

Webcast - recorded

 
Oscilloscope Measurements Webcast Series 
Live and on-demand broadcasts that will teach you how to make precise measurements with its Infiniium line of real-time and sampling oscilloscopes.

Webcast

 
Overcome High Speed Digital Design Challenges Webcast Series 
Series of live and on-demand webcasts

Webcast - recorded

 
Overcome PI Challenges on Perforated Power/Groung Planes 
This presentation explains a different approach that's applicable to PI analysis on cost reduced consumer boards whose power/ground planes are perforated with signal traces.

Seminar Materials 2012-01-19

PDF PDF 2.30 MB
Overcome Signal Integrity Challenges in the multigigabit(s) Era 
When digital signals reach gigabit/s speeds, the unpredictable becomes the norm. The process of getting your project back on track starts with the best tools for the job.

Seminar Materials 2011-12-15

PDF PDF 781 KB
Overcoming MIPI Physical and Protocol Layer Test Challenges Seminar 
Santa Clara, CA - May 30, 2014

Seminar

 
Overcoming Return-Path-Discontinuity in DDR3 and GDDR5 Memory-Controller Packages 
A day in the life of a Memory Architect.

Seminar Materials 2011-10-24

PDF PDF 1.86 MB
PCI Express 3.0 Compliance - Successfully Navigating the Standard Webcast 
Original broadcast May 7, 2013

Webcast - recorded

 
PCI Express 3.0 How to pass receiver compliance test for add-in cards and motherboards - webcast 
Original broadcast October 27, 2011

Webcast - recorded

 
PCI Express 3.0 Receiver test of ASICs- how to face this challenge - webcast 
When PCIe 3.0 was generated, it was a goal to re-use the existing passive infrastructure - the channels. With nearly double the signal rate (8Gb/s vs. 5Gb/s), the error free transmission now heavily depends on the RX. Therefore it is now normati...

Webcast - recorded

 
PCI Express(R) 3.0 Strategies for Transmitter and Receiver Validation 
Originally broadcast Feb 10, 2011

Webcast - recorded

 
PCIe™ 3.0 Receiver Testing: How to Generate the Test Set-up and Calibrate the Stressed Eye 
Originally broadcast October 12, 2010

Webcast - recorded

 
Photonics North 2014 
May 28-30, 2014; Montreal, QC

Tradeshow

 
Physical Layer design challenges for PCI Express® 3.0 and 2.0 designs 
You will learn advanced techniques for PCI Express phy-layer validation covering the latest PCIe 3.0 specification requirements as well as practical extensions to PCIe 2.0 and 1.1 designs. This seminar analyzes transmitter and receiver performance.

Webcast - recorded

 
Physical Layer Test Challenges and Solutions for MIPI Interfaces Webcast 
Original broadcast January 30, 2013

Webcast - recorded

 
Practical Guide to 100G Electrical Compliance Testing Webcast 
Original broadcast August 28, 2013

Webcast - recorded

 

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