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Digital Design & Interconnect Standards

Achieve your best design with Agilent. Investigate specific solutions for high speed standards plus solutions for your high-speed digital design cycle (design, simulation, analysis, debug compliance and signal integrity) challenges.

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Designing High Speed Backplanes Utilizing Physical Layer Test System 
This Application Note focuses on the problems introduced into the backplane assembly design by the many linear passive components that create reflections due to impedance discontinuities.

Application Note 2006-01-18

PDF PDF 1.24 MB
Languages 
Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow 
Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow.

Application Note 2012-09-21

PDF PDF 467 KB
Languages 
Frequency Domain Analysis of Jitter Amplification in Clock Channels 
Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained.

Application Note 2012-11-01

PDF PDF 257 KB
Signal Integrity Analysis Series Part 1: Single-Port TDR, TDR/TDT, & 2-Port TDR 
This Application Note focuses on part 1: those which use a single-port TDR, those which use TDR/TDT, and those which use 2-port TDR.

Application Note 2007-01-01

PDF PDF 3.50 MB
Signal Integrity Analysis Series Part 2: 4-Port TDR/VNA/PLTS 
This Application Note focuses on part 2: those which use a 4-port TDR/VNA/PLTS.

Application Note 2007-02-21

PDF PDF 2.75 MB
Signal Integrity Analysis Series Part 3: The ABCs of De-Embedding 
This Application Note focuses on Part 3: The ABCs of De-Embedding explaining different de-embedding techniques & shows how to minimize fixture effects for best results.

Application Note 2007-07-01

PDF PDF 2.44 MB
Simulating FPGA Power Integrity Using S-Parameter Models 
This application note describes how self-impedance (frequency) can easily be determined by simulating the frequency domain self-impedance profile of a Power Distribution Network (PDN).

Application Note 2012-04-02

PDF PDF 5.68 MB
Languages 
Simulating High-Speed Serial Channels with IBIS-AMI Models 
This paper reviews some of the benefits and limitations of using IBIS models and introduces the new AMI extensions to the latest IBIS version 5.0 specification.

Application Note 2011-11-15

PDF PDF 327 KB
Languages 
Using ADS for Signal Integrity Optimization 
This white paper shows how to replace a multi-dimensional sweep of a long running PRBS time-domain simulation (including manual data evaluation) by short, channel-pulse characterization in the Advanced Design System to efficiently optimize a channel.

Application Note 2009-10-19

PDF PDF 275 KB
Languages 
Using Clock Jitter Analysis to Reduce BER in Serial Data Applications 
This Application Note emphasizes on the emerging techniques for reference clock jitter analysis from the perspective of oscillator physics, phase noise theory, and serial data technology.

Application Note 2006-12-01

PDF PDF 1.15 MB
Languages 
Which Electromagnetic Simulator Should I Use? 
This paper outlines three of the key EM simulation technologies, MoM, FEM, FDTD and attempt to compare and contrast the relative merits of each.

Application Note 2012-04-06

PDF PDF 3.21 MB