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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Agilent - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more 
 

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ADS in 3D: Speed Your Design with Integrated 3D EM Simulation 
Originally broadcast March 24, 2010

Webcast - recorded

 
Astonishing Enhancements to Signal Integrity EDA Tools Using Video Game 3D Glasses and GPUs 
Original broadcast Jan 21, 2010

Webcast - recorded

 
Case Study: Overcoming Return-path Discontinuity in DDR3/GDDR5 Memory Controller Packages 
Original broadcast October 13, 2011

Webcast - recorded

 
DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

Tradeshow

 
EDN Editorial Webcast: Signal Integrity and High-Speed Board Design 
Originally broadcast Jan 25, 2011

Webcast - recorded

 
Ethernet Compliance Testing: Become More Green and Energy Efficient Webcast 
Original broadcast March 20, 2013

Webcast - recorded

 
Fixture De-embedding Techniques for 28 Gb/s Transmitter Measurements Webcast 
Live broadcast January 23, 2014; 10am PT/1pm ET/19:00 CET

Webcast - recorded

 
Genesys Webcasts - "How-To-Design" series  
Originally broadcast in 2009. Access the 6 WebEX recordings

Webcast - recorded

 
High-Sensitivity Current Measurements using an Oscilloscope Webcast 
Original broadcast April 17, 2013

Webcast - recorded

 
IMS 2013 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue 
ORDER the CD of the MicroApps presented at the show!

Tradeshow

 
Innovations in EDA: Multi-Technology RF Design Using the New Advances in ADS 2011 
Originally broadcast March 1, 2011

Webcast - recorded

 
Innovations in EDA: Opto-Electronic Signal Integrity on Optical Fiber Chip-to-Chip Link 
Originally broadcast April 7, 2011

Webcast - recorded

 
Innovations in EM Simulation for High Speed Digital Design 
Original broadcast Nov 18, 2010; Part of the Series: Signal Integrity for High Speed Digital Interconnects.

Webcast - recorded

 
Is Simulation a Requirement for Memory Designs Webcast 
Original broadcast February 20, 2013

Webcast - recorded

 
Minimizing Crosstalk in Hi-Speed Interconnects using Measurement-based Modeling 
This Presentation presented by Mike Resso (Agilent Technologies) focuses on minimizing crosstalk in high speed interconnects using measurement-based modeling.

Seminar Materials 2006-09-01

PDF PDF 1.50 MB
Modeling Optical Fiber Communication with Channel Simulation Webcast 
Original broadcast March 6, 2013

Webcast - recorded

 
Navigating Compliance Standards Panel Discussion 
Original broadcast July 17, 2013

Webcast - recorded

 
Overcome High Speed Digital Design Challenges Webcast Series 
Series of live and on-demand webcasts

Webcast - recorded

 
Overcome PI Challenges on Perforated Power/Groung Planes 
This presentation explains a different approach that's applicable to PI analysis on cost reduced consumer boards whose power/ground planes are perforated with signal traces.

Seminar Materials 2012-01-19

PDF PDF 2.30 MB
Signal Integrity Design Using Channel Simulation and EM Co-design 
The materials in this self-guided workshop will show you the “what if” design space exploration workflow that our new statistical eye diagram channel simulator enables

Seminar Materials 2010-04-21

 
Signal Integrity: Include Post-layout PCB Artwork into your Eye Diagram and BER Contour Simulation 
Originally broadcast May 5, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.

Webcast - recorded

 
Simulation-Measurement Workflow for DDR Compliance Webcast 
Original broadcast March 27, 2014

Webcast - recorded

 
Simultaneous Switching Noise Analysis in DDR4 applications using Power-Aware IBIS Models Webcast 
Live broadcast May 22, 2014; 10am PT/1pm ET

Webcast

 
Solving New High-Speed Design Challenges with ADS 2013.06 
In this seminar, leading Agilent EEsof R&D Designers provide a first-hand look at the new HSD features for the world class ADS transient and channel convolution simulators.

Seminar Materials 2013-07-10

 
Successful High Speed Digital Design with ADS, EMPro, and SystemVue 
The materials in this self-guided workshop will show you the latest high speed digital capabilites in ADS 2011.

Seminar Materials 2011-09-29

 

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