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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Agilent - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more 
 

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SFP+ and 10GBASE-KR Transmitter Compliance Testing using an Oscilloscope Webcast 
Original broadcast February 19, 2014

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Webcast: Do You Have What it Takes to Test HDMI 2.0? 
Original broadcast March 12, 2014

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Breakthrough Developments in TDR/TDT Measurement Technology Webcast 
Original broadcast May 7, 2014

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Simulation-Measurement Workflow for DDR Compliance Webcast 
Original broadcast March 27, 2014

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Practical Guide to 100G Electrical Compliance Testing Webcast 
Original broadcast August 28, 2013

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Accelerate DDR4/LPDDR3 Memory Debug with Bus level Signal Integrity Insight Webcast 
Original broadcast March 4, 2014

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ADS in 3D: Speed Your Design with Integrated 3D EM Simulation 
Originally broadcast March 24, 2010

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Accelerate FPGA Debug by Applying Latest Tools and Methods Webcast 
Original broadcast June 10, 2014

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Simultaneous Switching Noise Analysis in DDR4 applications using Power-Aware IBIS Models Webcast 
Original broadcast May 22, 2014

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Fixturing and Fixture Removal for Multiport Devices with Non-Standard RF Interfaces Webcast 
Original broadcast March 11, 2014

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Advanced Oscilloscope Measurements – Utilizing Math and Measurements Capability 
Original broadcast June 3, 2014

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EMC Back to Basics Webcast 
Original broadcast April 16, 2014

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Network Analysis Back to Basics Webcast 
Recorded broadcast August 21, 2013

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Do you use Oscilloscopes in the 1 GHz to 6 GHz bandwidth range? 
Original broadcast June 24, 2014

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Which EM Solver Should I Use? 
Originally broadcast June 15, 2010

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Case Study: Overcoming Return-path Discontinuity in DDR3/GDDR5 Memory Controller Packages 
Original broadcast October 13, 2011

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Innovations in EM Simulation for High Speed Digital Design 
Original broadcast Nov 18, 2010; Part of the Series: Signal Integrity for High Speed Digital Interconnects.

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Physical Layer design challenges for PCI Express® 3.0 and 2.0 designs 
You will learn advanced techniques for PCI Express phy-layer validation covering the latest PCIe 3.0 specification requirements as well as practical extensions to PCIe 2.0 and 1.1 designs. This seminar analyzes transmitter and receiver performance.

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Boundary Scan for Testing On-Board DDRs Webcast 
Original broadcast October 22, 2013

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Signal Integrity: Include Post-layout PCB Artwork into your Eye Diagram and BER Contour Simulation 
Originally broadcast May 5, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.

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Addressing Design and Test Challenges for the New LTE-Advanced Standard Webcast 
Original broadcast July 15, 2014

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Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

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DDR memory Characterization Using a Mixed Signal Oscilloscope Webcast 
Original broadcast October 16, 2013

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Innovations in EDA: Multi-Technology RF Design Using the New Advances in ADS 2011 
Originally broadcast March 1, 2011

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Extreme Oscilloscope Probing Webcast 
Original broadcast December 4, 2013

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