印制电路板测试和检验
1-25 / 115
|
Impedance and Network Analysis Application List Application Note
This document provides the information of unique and new solutions for impedance and network analysis with using Agilent impedance analyzers, LCR meters and ENA series network analyzers.
应用说明 2012-10-30 |
|
|
使用网络和阻抗分析仪评测13.56 MHz RFID 标签和阅读器/记录器
本应用指南面向从事 RFID 天线设计和测试的工程师,探讨了如何使用网络分析仪和阻抗分析仪测试 RFID 天线特征,例如阻抗和谐振频率。
应用说明 2012-06-08 |
|
|
Boundary-Scan Advanced Diagnostic Methods
This paper illustrates how usage of boundary scan circuit information and predictive analysis of potential assembly faults will provide more precise and accurate diagnostic information.
文章 2012-04-17 |
|
|
Testing DDR Memory; How On-Chip DFT Helps
This paper discusses DDR memory testing challenges we see today, and how the adoption of DFT capabilities pays off in higher test coverage, better diagnostics and reduced programming/support time.
文章 2012-04-17 |
|
|
Silicon Nails increases your test coverage
基本演示 2011-07-22 |
|
|
How to build a fixture for use with the Agilent Cover-Extend Technology
Cover-Extend Technology is Agilent’s latest limited access solution for in-circuit test. This paper documents the necessary information for a fixture vendor to build a Cover-Extend fixture.
应用说明 2011-06-24 |
|
|
Surviving State Disruptions Caused by Test: the "Lobotomy Problem"
This paper examines some issues and trends that justify adding features to IEEE 1149.1 that will facilitate safe, fast and effective initialization of a board or system, to get it ready for testing. Published with kind permission of the IEEE
文章 2010-12-10 |
|
|
Principal Component Analysis-Based Compensation for Measurement Errors
This paper examines some issues and trends that justify adding features to IEEE 1149.1 that will facilitate safe, fast and effective initialization of a board or system, to get it ready for testing. Published with kind permission of the IEEE
文章 2010-12-10 |
|
|
Solutions for Undetected Shorts on IEEE 1149.1 Self-Monitoring Pins
This paper presents the problem of undetected shorts on IEEE 1149.1 compliant self-monitoring pins, and potential mitigating solutions.
文章 2010-12-10 |
|
|
Limited Access Tools Improve Test Coverage
Smaller test pads and shrinking board sizes are posing new challenges, and driving innovations to overcome limited access with new test solutions. Agilent Boundary Scan, 1149.6, 1149.1, bead probes, cover-extend
文章 2010-10-20 |
|
|
The Proposed IEEE Test Standards
There is a resurgence of interest in Boundary Scan and Built in Self Test (BIST) initiatives to be part of IEEE standards. This article explains the IEEE standard and their benefits to the industry. Agilent Boundary Scan, 1149.6, 1149.1, bead probes, cover-extend
文章 2010-10-20 |
|
|
Boundary Scan Press Releases
新闻资料 2010-07-14 |
|
|
Comparing Boundary Scan Methods White Paper
The need for reusable tests is driving standalone boundary scan-ICT integration. This article first appeared in the September 2009 issue of Circuits Assembly and is reprinted with kind permission.
文章 2010-06-09 |
|
|
Medalist VTEP v2.0 Powered, with Cover-Extend technology
This brochure provides an overview of Cover-Extend under the VTEP v2.0 Powered vectorless test suite
手册 2010-04-06 |
|
|
Medalist i3070 In Circuit Test – Utilizing the most comprehensive Limited Access
This article introduces the seven most prominent and effective limited access tools on the Agilent Medalist i3070 ICT, collectively known Super 7 suite.
应用说明 2009-03-06 |
|
|
Non-Contact Measurement Method for 13.56 MHz RFID Tags Using the ENA/ENA-L Network Analyzer
For engineers working in RFID antenna design and test, this note discusses a non-contact method for measuring resonant frequencies of RFIDs using a network analyzer.
应用说明 2009-02-20 |
|
|
High Node Count Fixturing Solutions for Agilent Short-Wire Test Fixtures
This paper discusses problems encountered in building large, high node count vacuum actuated test fixtures for the Agilent 3070 family of board test systems.
应用说明 2008-04-30 |
|
|
Maximising Test Coverage with Agilent Medalist VTEP v2.0
This paper describes how to get the most from Agilent Technologies’ industry-leading vectorless test innovation, the Medalist VTEP v2.0 which is a suite of solution comprising VTEP, iVTEP and NPM.
应用说明 2007-04-17 |
|
|
Life and Stability of the Agilent 5DX Sealed X-ray Tube
Agilent has developed a sealed ultra-high vacuum X-ray tube that provides stable output throughout a significantly long life.
应用说明 2007-01-22 |
|
|
Considerations for Surface Map Setup
The concept of delta-Zs is perhaps the most difficult thing to understand about the surface map process.
应用说明 2006-08-08 |
|
|
SEMI S2 Standard Modifications for Agilent 3070 and Related Equipment
This document describes three items pertaining to the Agilent 3070 and the SEMI S2 standard. Each of them is related to a variance with the SEMI standard.
应用说明 2006-06-15 |
|
|
AOI - A Strategy for Closing the Loop
This paper describes a set of defect prevention solutions centered on the availability of high-quality inspection and measurements data from an AOI system and a few carefully engineered software applications
应用说明 2006-04-16 |
|
|
“Shotgunning”, a Bad Fit for Lead-Free Test
Shotgunning, a common repair technique in functional test, will be negatively affected by lead-free processes. This article explores the technique and draws broad conclusions regarding the impact of lead-free on electronics manufacturing test
应用说明 2006-02-07 |
|
|
How to Get the Most from Agilent's Intelligent Yield Enhancement Test (IYET)
This paper describes how to get the most from IYET for Agilent board test systems.
应用说明 2005-07-15 |
|
|
Design Considerations for PC Board Carriers for Use in the Agilent 5DX
There are several reasons why it may be necessary or desirable to use a carrier to transport printed circuit assemblies through the 5DX. This paper discusses these and some considerations for the design of suitable carriers.
应用说明 2005-07-13 |
|
