PCB (Printed Circuit Board)
1-25 / 115
|
Impedance and Network Analysis Application List Application Note
This document provides the information of unique and new solutions for impedance and network analysis with using Agilent impedance analyzers, LCR meters and ENA series network analyzers.
어플리케이션 노트 2012-10-30 |
PDF
1.11 MB
|
|
Boundary-Scan Advanced Diagnostic Methods
This paper illustrates how usage of boundary scan circuit information and predictive analysis of potential assembly faults will provide more precise and accurate diagnostic information.
기사 2012-04-17 |
PDF
1.20 MB
|
|
Testing DDR Memory; How On-Chip DFT Helps
This paper discusses DDR memory testing challenges we see today, and how the adoption of DFT capabilities pays off in higher test coverage, better diagnostics and reduced programming/support time.
기사 2012-04-17 |
PDF
530 KB
|
|
Using a Network and Impedance Analyzer to Evaluate 13.56 MHz RFID Tags and Readers/Writers
For engineers who work in RFID antenna design and test, this note discusses testing RFID antenna characteristics such as impedance and resonant-frequency with network and impedance analyzers.
어플리케이션 노트 2012-02-08 |
|
|
Silicon Nails increases your test coverage
기본 데모 2011-07-22 |
|
|
How to build a fixture for use with the Agilent Cover-Extend Technology
Cover-Extend Technology is Agilent’s latest limited access solution for in-circuit test. This paper documents the necessary information for a fixture vendor to build a Cover-Extend fixture.
어플리케이션 노트 2011-06-24 |
PDF
1.09 MB
|
|
Surviving State Disruptions Caused by Test: the "Lobotomy Problem"
This paper examines some issues and trends that justify adding features to IEEE 1149.1 that will facilitate safe, fast and effective initialization of a board or system, to get it ready for testing. Published with kind permission of the IEEE
기사 2010-12-10 |
PDF
402 KB
|
|
Principal Component Analysis-Based Compensation for Measurement Errors
This paper examines some issues and trends that justify adding features to IEEE 1149.1 that will facilitate safe, fast and effective initialization of a board or system, to get it ready for testing. Published with kind permission of the IEEE
기사 2010-12-10 |
PDF
1.10 MB
|
|
Solutions for Undetected Shorts on IEEE 1149.1 Self-Monitoring Pins
This paper presents the problem of undetected shorts on IEEE 1149.1 compliant self-monitoring pins, and potential mitigating solutions.
기사 2010-12-10 |
PDF
789 KB
|
|
Limited Access Tools Improve Test Coverage
Smaller test pads and shrinking board sizes are posing new challenges, and driving innovations to overcome limited access with new test solutions. Agilent Boundary Scan, 1149.6, 1149.1, bead probes, cover-extend
기사 2010-10-20 |
PDF
275 KB
|
|
The Proposed IEEE Test Standards
There is a resurgence of interest in Boundary Scan and Built in Self Test (BIST) initiatives to be part of IEEE standards. This article explains the IEEE standard and their benefits to the industry. Agilent Boundary Scan, 1149.6, 1149.1, bead probes, cover-extend
기사 2010-10-20 |
PDF
2.83 MB
|
|
Boundary Scan Press Releases
보도자료 2010-07-14 |
|
|
Comparing Boundary Scan Methods White Paper
The need for reusable tests is driving standalone boundary scan-ICT integration. This article first appeared in the September 2009 issue of Circuits Assembly and is reprinted with kind permission.
기사 2010-06-09 |
PDF
2.68 MB
|
|
Medalist VTEP v2.0 Powered, with Cover-Extend technology
This brochure provides an overview of Cover-Extend under the VTEP v2.0 Powered vectorless test suite
브로셔 2010-04-06 |
PDF
237 KB
|
|
Medalist i3070 In Circuit Test – Utilizing the most comprehensive Limited Access
This article introduces the seven most prominent and effective limited access tools on the Agilent Medalist i3070 ICT, collectively known Super 7 suite.
어플리케이션 노트 2009-03-06 |
PDF
342 KB
|
|
Non-Contact Measurement Method for 13.56 MHz RFID Tags Using the ENA/ENA-L Network Analyzer
For engineers working in RFID antenna design and test, this note discusses a non-contact method for measuring resonant frequencies of RFIDs using a network analyzer.
어플리케이션 노트 2009-02-20 |
PDF
199 KB
|
|
High Node Count Fixturing Solutions for Agilent Short-Wire Test Fixtures
This paper discusses problems encountered in building large, high node count vacuum actuated test fixtures for the Agilent 3070 family of board test systems.
어플리케이션 노트 2008-04-30 |
PDF
67 KB
|
|
Maximising Test Coverage with Agilent Medalist VTEP v2.0
This paper describes how to get the most from Agilent Technologies’ industry-leading vectorless test innovation, the Medalist VTEP v2.0 which is a suite of solution comprising VTEP, iVTEP and NPM.
어플리케이션 노트 2007-04-17 |
|
|
Life and Stability of the Agilent 5DX Sealed X-ray Tube
Agilent has developed a sealed ultra-high vacuum X-ray tube that provides stable output throughout a significantly long life.
어플리케이션 노트 2007-01-22 |
PDF
78 KB
|
|
Considerations for Surface Map Setup
The concept of delta-Zs is perhaps the most difficult thing to understand about the surface map process.
어플리케이션 노트 2006-08-08 |
|
|
SEMI S2 Standard Modifications for Agilent 3070 and Related Equipment
This document describes three items pertaining to the Agilent 3070 and the SEMI S2 standard. Each of them is related to a variance with the SEMI standard.
어플리케이션 노트 2006-06-15 |
PDF
52 KB
|
|
AOI - A Strategy for Closing the Loop
This paper describes a set of defect prevention solutions centered on the availability of high-quality inspection and measurements data from an AOI system and a few carefully engineered software applications
어플리케이션 노트 2006-04-16 |
PDF
291 KB
|
|
“Shotgunning”, a Bad Fit for Lead-Free Test
Shotgunning, a common repair technique in functional test, will be negatively affected by lead-free processes. This article explores the technique and draws broad conclusions regarding the impact of lead-free on electronics manufacturing test
어플리케이션 노트 2006-02-07 |
PDF
44 KB
|
|
How to Get the Most from Agilent's Intelligent Yield Enhancement Test (IYET)
This paper describes how to get the most from IYET for Agilent board test systems.
어플리케이션 노트 2005-07-15 |
|
|
Design Considerations for PC Board Carriers for Use in the Agilent 5DX
There are several reasons why it may be necessary or desirable to use a carrier to transport printed circuit assemblies through the 5DX. This paper discusses these and some considerations for the design of suitable carriers.
어플리케이션 노트 2005-07-13 |
PDF
918 KB
|
myAgilent에 등록
제품 등록
왜 애질런트 일까요?