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High-Speed Digital

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In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.

Navigate the entire design cycle

Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.

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Ethernet Compliance Testing: Become More Green and Energy Efficient Webcast 
Original broadcast March 20, 2013

Webcast - recorded

 
Fixture De-embedding Techniques for 28 Gb/s Transmitter Measurements Webcast 
Live broadcast January 23, 2014; 10am PT/1pm ET/19:00 CET

Webcast - recorded

 
Fixturing and Fixture Removal for Multiport Devices with Non-Standard RF Interfaces Webcast 
Original broadcast March 11, 2014

Webcast - recorded

 
Genesys Webcasts - "How-To-Design" series  
Originally broadcast in 2009. Access the 6 WebEX recordings

Webcast - recorded

 
Hacking the Backplane:Complete Differential Channel Characterization & Analysis from 4-port Meas. 

Seminar Materials 2008-11-09

 
High-Sensitivity Current Measurements using an Oscilloscope Webcast 
Original broadcast April 17, 2013

Webcast - recorded

 
High-Speed Digital Design & Verification Seminar 
A methodology for predictable design closure in the high speed digital era.

Seminar Materials 2013-11-22

PDF PDF 5.45 MB
High-speed Oscilloscope Probing: Ensuring Maximum Performance and Signal Integrity 
Originally broadcast March 10, 2011

Webcast - recorded

 
How to Anticipate Signal Integrity Issues 
Improve channel simulation by using an electromagnetic based model

Seminar Materials 2013-11-22

PDF PDF 9.21 MB
How to Characterize and Debug High-Speed Digital Links on Your Physical Prototype 
What part of your design is eating up your Eye margins?

Seminar Materials 2013-11-22

PDF PDF 3.70 MB
How to Solve DDR Signal Integrity Validation Challenges 
How to Solve DDR Signal Integrity Validation Challenges

Training Materials 2008-02-13

 
IMS 2013 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue 
ORDER the CD of the MicroApps presented at the show!

Tradeshow

 
InfiniBand Compliance and System Testing 
This tutorial provides an overview of Infiniband test requirements, compliance and system tests, and performance measurements.

Training Materials 2002-07-26

PDF PDF 906 KB
Innovations in EDA: Multi-Technology RF Design Using the New Advances in ADS 2011 
Originally broadcast March 1, 2011

Webcast - recorded

 
Innovations in EDA: Opto-Electronic Signal Integrity on Optical Fiber Chip-to-Chip Link 
Originally broadcast April 7, 2011

Webcast - recorded

 
Innovations in EM Simulation for High Speed Digital Design 
Original broadcast Nov 18, 2010; Part of the Series: Signal Integrity for High Speed Digital Interconnects.

Webcast - recorded

 
Introduction to EMI/EMC Challenges and Their Solution 
Agilent EEsof EDA presentation on how to, "Overcome High Speed Digital Design Challenges".

Seminar Materials 2012-02-16

PDF PDF 3.46 MB
Is Simulation a Requirement for Memory Designs Webcast 
Original broadcast February 20, 2013

Webcast - recorded

 
Jitter Analysis: What Works, What Doesn't & Why eSeminar FAQs 
FAQs from the eSeminar

Seminar Materials 2006-05-11

PDF PDF 63 KB
Jitter in Digital Circuits eSeminar FAQs 
FAQs from the eSeminar

Seminar Materials 2006-05-11

PDF PDF 34 KB
Jitter Measurements for High-Speed Digital 
Jitter Measurements for High-Speed Digital Transmission

Seminar Materials 2006-06-14

PDF PDF 44 KB
Jitter Measurements with a High-Speed Scope eSeminar FAQs 
FAQs from the eSeminar

Seminar Materials 2006-05-11

PDF PDF 117 KB
Keeping up with 10G USB 3.1 Physical Layer Test Challenges Webcast 
Original broadcast January 15, 2014

Webcast - recorded

 
Learn to Analyze, Validate and Debug High Speed DDR3 Memory 
Original broadcast Oct 4, 2011

Webcast - recorded

 
Making Your Most Accurate DDR4 Compliance Measurements Webcast 
Originally broadcast January 23, 2013

Webcast - recorded

 

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