High-Speed Digital
- Design & Simulation: Download the Quick Start Guide
- Analysis & Debug: Download the Debugging application note
- Compliance: Visit the compliance web page
- Signal Integrity: Link to the PLTS technical overview
In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.
Navigate the entire design cycle
Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.
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By Application
- Signal Integrity (16)
- Design and Simulation of High-Speed Digital (19)
- High-Speed Digital Analysis (1)
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- Compliance for High-Speed Bus and Serial Interconnects (2)
By Type of Content
- Seminar Materials (4)
- Tradeshow (4)
- Seminar (1)
- Webcast - recorded (15)
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Software
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Agilent EEsof EDA Software
- Advanced Design System (ADS) (19)
- EMPro 3D EM Simulation Software (4)
- SystemVue ESL Software (9)
- Genesys RF and Microwave Design Software (3)
- GoldenGate RFIC Simulation Software (3)
- Momentum 3D Planar EM Simulator (2)
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Agilent EEsof EDA Software
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Software
1-25 of 25
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Astonishing Enhancements to Signal Integrity EDA Tools Using Video Game 3D Glasses and GPUs
Originally broadcast Jan 21, 2010
Webcast - recorded |
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Case Study: Overcoming Return-path Discontinuity in DDR3/GDDR5 Memory Controller Packages
Original broadcast October 13, 2011
Webcast - recorded |
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EDN Editorial Webcast: Signal Integrity and High-Speed Board Design
Originally broadcast Jan 25, 2011
Webcast - recorded |
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EMC 2013 - IEEE International Symposium on Electromagnetic Compatibility
August 5- 9, 2013; Denver, CO
Tradeshow |
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Ethernet Compliance Testing: Become More Green and Energy Efficient Webcast
Original broadcast March 20, 2013
Webcast - recorded |
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Genesys Webcasts - "How-To-Design" series
Originally broadcast in 2009. Access the 6 WebEX recordings
Webcast - recorded |
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High-Sensitivity Current Measurements using an Oscilloscope Webcast
Original broadcast April 17, 2013
Webcast - recorded |
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IMS 2011 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
2011 show, last June, 2011; Baltimore Convention Center
Tradeshow |
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IMS 2012 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
June 17-22, 2012 in Montréal, Canada
Tradeshow |
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IMS 2013 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue
June 2 - 7, 2013 in Seattle, WA
Tradeshow |
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Innovations in EDA: Multi-Technology RF Design Using the New Advances in ADS 2011
Originally broadcast March 1, 2011
Webcast - recorded |
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Innovations in EDA: Opto-Electronic Signal Integrity on Optical Fiber Chip-to-Chip Link
Originally broadcast April 7, 2011
Webcast - recorded |
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Innovations in EM Simulation for High Speed Digital Design
Originally broadcast Nov 18, 2010; Part of the Series: Signal Integrity for High Speed Digital Interconnects.
Webcast - recorded |
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Is Simulation a Requirement for Memory Designs Webcast
Live broadcast February 20, 2013; 10am Pacific / 1pm Eastern
Webcast |
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Minimizing Crosstalk in Hi-Speed Interconnects using Measurement-based Modeling
This Presentation presented by Mike Resso (Agilent Technologies) focuses on minimizing crosstalk in high speed interconnects using measurement-based modeling.
Seminar Materials 2006-09-01 |
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Modeling Optical Fiber Communication with Channel Simulation Webcast
Live broadcast March 6, 2013; 10am Pacific / 1pm Eastern
Webcast - recorded |
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Overcome High Speed Digital Design Challenges Webcast Series
Series of live and on-demand webcasts
Webcast - recorded |
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Overcome PI Challenges on Perforated Power/Groung Planes
This presentation explains a different approach that's applicable to PI analysis on cost reduced consumer boards whose power/ground planes are perforated with signal traces.
Seminar Materials 2012-01-19 |
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Signal Integrity Design Using Channel Simulation and EM Co-design
The materials in this self-guided workshop will show you the “what if” design space exploration workflow that our new statistical eye diagram channel simulator enables
Seminar Materials 2010-04-21 |
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Signal Integrity: Include Post-layout PCB Artwork into your Eye Diagram and BER Contour Simulation
Originally broadcast May 5, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.
Webcast - recorded |
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Successful High Speed Digital Design with ADS, EMPro, and SystemVue
The materials in this self-guided workshop will show you the latest high speed digital capabilites in ADS 2011.
Seminar Materials 2011-09-29 |
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Test & Measurement events in Europe, Middle East & Africa
Test & Measurement events in Europe, the Middle East, and Africa - seminars, trade shows, user group meetings, webcasts, tutorials and conferences.
Seminar |
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Understanding Cross Modulation Effects in a Full Duplex LTE Transceiver
Originally broadcast July 22, 2010
Webcast - recorded |
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Using IBIS AMI Models as ‘Executable Data sheets’ in High Speed Digital Interconnect Simulations
Originally broadcast Sept 9, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.
Webcast - recorded |
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What on Earth is Jitter Amplification, and Why Should I Care Webcast
Original broadcast April 9, 2013
Webcast - recorded |
