High-Speed Digital
- Design & Simulation: Download the Quick Start Guide
- Analysis & Debug: Download the Debugging application note
- Compliance: Visit the compliance web page
- Signal Integrity: Link to the PLTS technical overview
In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.
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Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.
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By Application
- Signal Integrity (16)
- Design and Simulation of High-Speed Digital (26)
- High-Speed Digital Analysis (38)
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- Compliance for High-Speed Bus and Serial Interconnects (10)
By Type of Content
- Document Library
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- Application Note (102)
- Application Notes
By Product Category
26-50 of 102
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Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow
Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow.
Application Note 2012-09-21 |
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Eye Characterization on Idle and Framed Data Traffic: the Bit Recovery Mode
Traditionally, bit error rate testing compares the bits from a Device Under Test (DUT) against a reference data set, called the expected data. The user of Bit Error Ratio Tester (BERT) has to provide this expected data and load it into the tester.
Application Note 2005-09-21 |
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Fast Total Jitter Test Solution
This application note compares different total jitter measurement and extrapolation techniques to the Fast Total Jitter Measurement
Application Note 2005-08-29 |
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Faster Risetime for TDR Measurements (PN 86100-4)
This product note demonstrates how to make time domain reflection (TDR) measurements on electrical networks with better than 40 ps resolution.
Application Note 2001-07-01 |
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Finding Sources of Jitter with Real-Time Jitter Analysis (AN 1448-2)
This application note describes how to use a real-time oscilloscope with jitter analysis, along with the stimulus-response techniques, to meet the critical time-correlation requirement to relate jitter trend measurement results to measured signals.
Application Note 2003-06-30 |
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Flat Panel Display Link Test
This Product Note shows how to verify the Bit Error Rate (BER) of 1-serial to 7-parallel Rx chip with the Agilent 81250 Parallel Bit Error Ratio Tester (ParBERT).
Application Note 2004-07-29 |
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Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.
Application Note 2009-03-24 |
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Frequency Domain Analysis of Jitter Amplification in Clock Channels
Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained.
Application Note 2012-11-01 |
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Generating/Measuring Jitter with the 81134A Pulse/Pattern Generator & 54855A Infiniium Scope
Describes how to generate and measure jitter with the 81133/34A and 54855A
Application Note 2003-06-30 |
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HDMI Sink and Source Compliance Test and Characterization
In this product note examples are given for advanced, automated HDMI compliance tests and characterization based on a high bandwidth oscilloscope, a TMDS Signal Generator and the Test Automation Software Platform.
Application Note 2006-10-27 |
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High Precision Time Domain Reflectometry (AN 1304-7)
Techniques for achieving the highest possible accuracy and resolution in signal integrity impedance measurements
Application Note 2003-10-27 |
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High-Precision TDR with the Agilent 86100 DCA & Picosecond Pulse Labs 4020 Source Enhancement Module
Learn how to build a high-precision time-domain reflectometry/time-domain transmission measurement system.
Application Note 2003-09-12 |
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High-Speed Source Synchronous Interface Design
presents considerations for high-speed interface design using examples from a DDRSDRAM implementation.
Application Note 2001-08-02 |
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Histograms Simplify Analysis of Random Jitter (AN 1200-9)
The Agilent 53310A's fast histograms make it easy to get complete view of clock jitter. The shape of the histogram indicates the nature of the jitter. For example a Gaussian-shaped distribution would suggest the jitter is random. Statistics are calculated automatically to provide the mean...
Application Note 2000-08-01 |
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How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)
Application Note 2007-07-30 |
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How to use the Agilent 81200 together with Agilent VEE
This attached Product Note shows how to use the Agilent 81200 Data Generator/Analyzer together with Agilent VEE for Signal Integrity Analysis.
Application Note 2002-01-28 |
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Improve Your Time-to-Insight:Debugging Intermittent Memory Failures in DDR and DDR2 Systems
Application Note 1575
Application Note 2006-04-14 |
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Improved Method for Characterizing and Modeling Gigabit Flex-Circuit Based Interconnects
This paper describes sophisticated, time-domain methods of accurately predicting time- and frequency-domain high-speed signal characteristics.
Application Note 2005-09-08 |
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Improving Usability and Performance in High-Bandwidth Active Oscilloscope Probes (AN 1419-02)
Understand how to get minimal probe loading and highest-possible-performance representation of your signal.
Application Note 2002-11-01 |
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In-circuit Debug of FPGAs
This application note covers key methods of debugging FPGAs along with technologies that reduce the number of pins needed for debug.
Application Note 2003-05-01 |
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InfiniBand System Level Debugging (AN 1382-1)
This application note is written for R & D engineers developing InfiniBand processors and InfiniBand system designers and integrators. It covers key concepts underlying system-level debug and validation of InfiniBand systems.
Application Note 2004-03-17 |
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Integrated Debugging-A New Approach to Troubleshooting Your Designs with Real-Time Oscilloscopes
Traditional debugging can be time consuming and inefficient. With Agilent Infiniium oscilloscopes,
“integrated debugging” is a reality, and it leads you directly to the root cause of problems.
Application Note 2008-01-30 |
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Jitter Analysis Techniques for High Data Rates (AN 1432)
This new application note describes the basic jitter measurements and the specific measurement techniques used in SONet/SDH/OTN and Gigabit Ethernet applications.
Application Note 2003-02-03 |
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Jitter Analysis: The Dual-Dirac Model, RJ/DJ, and Q-Scale
This paper provides a complete description of the dual-Dirac model, how it is used in technology standards and a summary of how it is applied on different types of test equipment.
Application Note 2005-06-15 |
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Jitter Fundamentals: Jitter Tolerance Testing with Agilent ParBERT 81250
This applicaiton note describes gain fast and efficient insight into the operation and performance of CDR, clock system and jitter tolerance.
Application Note 2003-12-02 |
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