Parla con un Esperto

High-Speed Digital

This content requires a browser with JavaScript enabled and the Adobe Flash Player.

Get Flash 

In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Agilent’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Agilent - achieve your best design.

Navigate the entire design cycle

Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.

Explore YouTube Videos 

Refine the List

remove all refinements

By Industry/Technology

By Type of Content

By Product Category

1-25 of 33

Sort:
Agilent EEsof MMIC Design Symposium - Tuesday 8th November 2011 
Agilent EEsof MMIC Design Symposium

Seminar

 
Eventi di Agilent Italia 
Benvenuti nella pagina degli eventi di Agilent Italia

Seminar

 
ADMF: Facing the challenges of Super speed USB 3.0 Product Development  
Agilent Digital Measurement Forum (ADMF): Facing the challenges of Super speed USB Product Development

Seminar Materials 2008-11-12

PDF PDF 1.78 MB
Astonishing Enhancements to Signal Integrity EDA Tools Using Video Game 3D Glasses and GPUs 
Original broadcast Jan 21, 2010

Webcast - recorded

 
Design and Test Challenges in Next Generation High-Speed Serial Standards 
Attend this FREE education workshop at DesignCon 2012, brought to you by Agilent Technologies, Official Host Sponsor of the conference.

Training Materials 2011-11-29

 
Digital and Photonics Webcast Series 
Originally broadcast 2010, 2011. Access the recordings of many broadcasts

Webcast - recorded

 
Ethernet Compliance Testing: Become More Green and Energy Efficient Webcast 
Original broadcast March 20, 2013

Webcast - recorded

 
Fixture De-embedding Techniques for 28 Gb/s Transmitter Measurements Webcast 
Live broadcast January 23, 2014; 10am PT/1pm ET/19:00 CET

Webcast - recorded

 
Genesys Webcasts - "How-To-Design" series  
Originally broadcast in 2009. Access the 6 WebEX recordings

Webcast - recorded

 
High-Sensitivity Current Measurements using an Oscilloscope Webcast 
Original broadcast April 17, 2013

Webcast - recorded

 
High-Speed Digital Design & Verification Seminar 
A methodology for predictable design closure in the high speed digital era.

Seminar Materials 2013-11-22

PDF PDF 5.45 MB
How to Anticipate Signal Integrity Issues 
Improve channel simulation by using an electromagnetic based model

Seminar Materials 2013-11-22

PDF PDF 9.21 MB
How to Characterize and Debug High-Speed Digital Links on Your Physical Prototype 
What part of your design is eating up your Eye margins?

Seminar Materials 2013-11-22

PDF PDF 3.70 MB
IMS 2013 (IEEE MTT-S) – Connect, Expert to Expert, at Agilent Avenue 
ORDER the CD of the MicroApps presented at the show!

Tradeshow

 
Innovations in EDA: Multi-Technology RF Design Using the New Advances in ADS 2011 
Originally broadcast March 1, 2011

Webcast - recorded

 
Innovations in EM Simulation for High Speed Digital Design 
Original broadcast Nov 18, 2010; Part of the Series: Signal Integrity for High Speed Digital Interconnects.

Webcast - recorded

 
Introduction to EMI/EMC Challenges and Their Solution 
Agilent EEsof EDA presentation on how to, "Overcome High Speed Digital Design Challenges".

Seminar Materials 2012-02-16

PDF PDF 3.46 MB
Is Simulation a Requirement for Memory Designs Webcast 
Original broadcast February 20, 2013

Webcast - recorded

 
Modeling Optical Fiber Communication with Channel Simulation Webcast 
Original broadcast March 6, 2013

Webcast - recorded

 
Overcome High Speed Digital Design Challenges Webcast Series 
Series of live and on-demand webcasts

Webcast - recorded

 
Overcome PI Challenges on Perforated Power/Groung Planes 
This presentation explains a different approach that's applicable to PI analysis on cost reduced consumer boards whose power/ground planes are perforated with signal traces.

Seminar Materials 2012-01-19

PDF PDF 2.30 MB
Overcome Signal Integrity Challenges in the multigigabit(s) Era 
When digital signals reach gigabit/s speeds, the unpredictable becomes the norm. The process of getting your project back on track starts with the best tools for the job.

Seminar Materials 2011-12-15

PDF PDF 781 KB
Overcoming Return-Path-Discontinuity in DDR3 and GDDR5 Memory-Controller Packages 
A day in the life of a Memory Architect.

Seminar Materials 2011-10-24

PDF PDF 1.86 MB
Signal Integrity Design Using Channel Simulation and EM Co-design 
The materials in this self-guided workshop will show you the “what if” design space exploration workflow that our new statistical eye diagram channel simulator enables

Seminar Materials 2010-04-21

 
Signal Integrity: Include Post-layout PCB Artwork into your Eye Diagram and BER Contour Simulation 
Originally broadcast May 5, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.

Webcast - recorded

 

1 2 Next