Electronic System-Level (ESL) Design Flow
SystemVue is a focused electronic design automation (EDA) environment for electronic system-level (ESL) design that enables system architects and algorithm developers to innovate the physical layer (PHY) of next-generation wireless and aerospace/defense communications systems. It virtualizes and unites 4 distinct domains of expertise into a common “design & verification cockpit” for earliest possible design maturity: Baseband algorithm modeling, RF EDA design flows, Standards-based reference IP, and Hardware verification and test.
SystemVue provides unique value to RF, DSP and FPGA/ASIC implementers who rely on both the RF and digital signal processing domains in order to deliver the full value of their hardware platforms with confidence.
- Best-in-class RF fidelity among today’s baseband/PHY environments, which enables baseband designers to virtualize the RF and eliminate excess margin
- Superior integration with Test accelerates real-world maturity and streamlines your model-based design flow, from architecture to verification
- World-class reference IP puts Agilent instrument-grade interoperability and Layer 1 compliance inside your block you have hardware
- Unified, open, polymorphic modeling simplifies tool flow, reduces department costs and supports a customizable, vendor-neutral environment
- Configured for networked workgroups to maximize design re-use and capitalize on baseband and RF synergies
For more information on SystemVue, refer to the SystemVue ESL Software page.
Return to the Electronic System-Level (ESL) Design page.
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