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What is a CPLD ISP?

A complex programmable logic devices (CPLD) in system programming (ISP) is a process of programming the CPLD devices that are already soldered in a printed circuit board assemply (PCBA).


The Agilent Medalist i3070 system can be used to program IEEE 1149.1 compliant CPLD using the test access port (TAP). This programming becomes part of the overall testplan and is executed during in circuit test (ICT).


The Agilent Medalist i3070 CPLD ISP implementation allows the test program developer to specify a configuration bitstream file in the VCL source code, much like programming a Flash memory device. In addition, multiple PLD configuration data formats are supported including:


• Serial Vector Format (SVF),
• Standard Test And Programming Language (STAPL),
• Jam,
• Jam Byte Code (JBC) object files.