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Digital designs are increasing in complexity due to higher clock speeds, increased software content, and greater component density.

This paper¹ presents techniques to help improve efficiency in digital debug, integration and verification. Measurement probe effects are considered, the synergy between EDA tools and logic analyzers is explored, board turn-on issues are clarified, and examples of bus timing analysis are given. The examples that are shown are based on the Motorola PowerPC™ 860 Microprocessor, FuturePlus Systems PCI bus analysis tools, and SynaptiCAD's Waveformer Pro tool.

¹Author: Gregg Buzard, Hewlett-Packard Company