PCIe™ 3.0 Receiver Testing: How to Generate the Test Set-up and Calibrate the Stressed Eye

Why this presentation is important:
By the end of this year PCI Express® rev. 3 will be released.
Doubling effective data rate vs rev. 2 without increasing the transfer rate by a factor of two resulted in quite a few changes on the phy layer. These changes and their consequences will be addressed at the beginning of the Webcast.
As this higher transfer rate is mainly achieved by a more sophisticated receiver (RX) with complex equalization, its testing is now normative and no more informative as before. Therefore, this Webcast will focus on RX testing, the specified test set-ups and the calibration of the test signals.
As the latter is very different from what was done before, a good part of the Webcast will describe this procedure.
In the end an outlook will be given upon what to expect from the upcoming CEM-specification as far as it is stable yet.

Who should attend:
R&D and Design Verification Engineers doing physical layer test and/or characterization on receivers of PCIe3 ports of ASICS and PCIe3 add-in-cards and motherboards. 

<sup>PCIe is a trademark of the PCI-SIG

PCI EXPRESS is a registered trademark of the PCI -SIG</sup>